Etching Stopper Layer Structure for Dense Semiconductor Interconnects
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge in semiconductor device fabrication is to achieve high integration density and low power consumption while managing the complex interplay of conductive and resistance patterns with etching stoppers, which requires precise control of etching processes and materials to maintain performance and reliability.
Innovation Solution
The semiconductor device incorporates a specific structure with multiple etching stopper films and insulating layers, including a first interlayer insulating film, conductive and resistance patterns, and via structures, where the distance and thickness of etching stopper films are carefully managed to optimize the etching process and connectivity between layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature size of semiconductor devices is decreased to achieve high integration density and low power consumption, then integration density and power consumption improve, but manufacturing precision and process control difficulty worsen
Solution Approach 1:
The patent divides the etching stopper structure into multiple segments: a first etching stopper film (lower) and a second etching stopper film (upper), with the resistance pattern positioned between them. This segmentation allows independent optimization of each layer's thickness and material properties, enabling precise control at reduced feature sizes while maintaining overall structural integrity for high integration density
Solution Approach 2:
The patent applies different materials and thicknesses to different regions of the etching stopper structure. The lower etching stopper film has a first thickness, while the upper etching stopper film has a second thickness greater than the first. This local quality differentiation enables precise etching control at specific locations, addressing manufacturing precision challenges in miniaturized devices
2Reliability
If multiple etching stopper films and insulating layers are added to optimize etching process and connectivity, then connectivity and reliability improve, but device complexity increases
Solution Approach 1:
The etching stopper films serve multiple functions: they act as etching barriers, provide structural support for via formation, and enable precise positioning of conductive and resistance patterns. This multi-functionality reduces the need for separate dedicated structures, improving connectivity while limiting the increase in overall device complexity
Solution Approach 2:
The patent implements a nested structure where the resistance pattern is positioned between the first and second etching stopper films, and via structures penetrate through multiple layers. This nesting allows compact arrangement of functional elements, improving connectivity without proportionally increasing device complexity
Data Source
AI summary
A semiconductor device including a first interlayer insulating film; a conductive pattern in the first interlayer insulating film; a resistance pattern on the conductive pattern; an upper etching stopper film spaced apart from the resistance pattern, extending in parallel with a top surface of the resistance pattern, and including a first metal; a lower etching stopper film on the conductive pattern, extending in parallel with a top surface of the first interlayer insulating film, and including a second metal; and a second interlayer insulating film on the upper etching stopper film and the lower etching stopper film, wherein a distance from a top surface of the second interlayer insulating film to a top surface of the upper etching stopper film is smaller than a distance from the top surface of the second interlayer insulating film to a top surface of the lower etching stopper film.