Ethernet Channel Impairment Cancellation via Clock Phase Synchronization

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Solution Overview

Problem

High-speed Ethernet communication systems face channel impairments such as echo and near-end cross talk due to timing phase differences between transmitters and receivers, leading to inefficiencies in echo and near-end cross talk cancellation, which increases bit error rate (BER) and affects transmission quality.

Innovation Solution

An Ethernet channel impairment enhancement apparatus and method that includes an echo canceller, near-end cross talk canceller, analog to digital converter, and clock generating unit, with a clock phase controller and timing recovery circuit to adjust the clock signal phase, allowing for optimal sampling and training of cancellation filter coefficients before data transmission, thereby minimizing BER.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If echo canceller and near-end cross talk canceller are trained using conventional timing, then the cancellation filters are configured, but phase differences between transmitter and receiver cause inefficient cancellation

Engineering Contradiction:
Improvecancellation efficiencyVSAvoidbit error rate
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The patent applies preliminary action by training the echo canceller and near-end cross talk canceller before the slave receiver converges. This advance training allows the master transmitter to establish optimal cancellation filter coefficients while the channel conditions are stable, eliminating phase difference issues that would occur with later training attempts.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses feedback by monitoring the convergence status of the slave receiver and using this information to determine when to train the cancellation filters. The training process is triggered based on feedback about receiver convergence, ensuring optimal timing for coefficient configuration.

Inventive Principle:
Principle #23Feedback

2Productivity

If training is performed after slave device sends signal, then normal communication can begin, but timing phase differences cause inefficient echo and cross talk cancellation

Engineering Contradiction:
Improvecommunication speedVSAvoidcancellation efficiency
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent performs the cancellation filter training in advance, before the slave device begins sending signals. This preliminary training ensures that the echo and cross talk cancellation is optimized before normal communication starts, avoiding the need to interrupt communication for training.

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If conventional timing is used for ADC operation, then the system operates simply, but phase differences between TX and RX reduce cancellation performance

Engineering Contradiction:
Improvesystem complexityVSAvoidcancellation efficiency
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent introduces a feedback mechanism where the ADC timing is adjusted based on timing recovery signals from the receiver. The phase of the clock signal is dynamically adjusted to synchronize with the receiver's timing, ensuring optimal sampling points for accurate signal reconstruction and effective cancellation.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8345583B2Method for enhancing ethernet channel impairment and apparatus using the same
Publication Date: 2013.01.01 MEDIATEK INC
  • US8345583B2 patent drawing
  • US8345583B2 patent drawing
  • US8345583B2 patent drawing

AI summary

A method for enhancing Ethernet channel impairment comprises the steps of sending a sequence to a receiver in a slave transceiver by a master transceiver, and training cancellation filter coefficients of an echo canceller and a near-end cross talk canceller in the master transceiver before the receiver of the slave transceiver converges.