Ethernet Clock Regeneration Node for Synchronization

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Solution Overview

Problem

Existing Ethernet networks face challenges in synchronization due to the lack of support for Synchronous Ethernet (Sync-E) and IEEE 1588 protocols in most nodes, leading to clocking issues, high costs, and long convergence times, especially when upgrading partial networks.

Innovation Solution

The implementation of a clock regeneration node that operates according to both Sync-E and IEEE 1588 protocols, allowing for clock regeneration and distribution across asynchronous nodes, reducing the number of slaves required for IEEE 1588 and enabling synchronization without the need for Sync-E upstream, combined with a best multi-source clock selection algorithm and holdover algorithm.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If Sync-E is used for clock distribution, then synchronization accuracy is improved, but all nodes must be Sync-E compliant which increases device complexity and cost

Engineering Contradiction:
Improvesynchronization accuracyVSAvoidnode compliance requirements
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces a boundary clock node as an intermediary that converts PTP timing information into Sync-E clock signals. This mediator allows Sync-E to propagate through the network without requiring all nodes to be Sync-E compliant, as the boundary clock performs the protocol conversion between PTP and Sync-E domains

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies local quality by enabling Sync-E functionality only where needed (at boundary clock nodes and downstream) rather than requiring it throughout the entire network. This allows synchronous Ethernet to be deployed in specific segments without mandating Sync-E compliance across all network devices

Inventive Principle:
Principle #3Local quality

2Adaptability or versatility

If PTP is used for clock distribution, then device compatibility is improved, but timing jitter increases due to traffic loading variations

Engineering Contradiction:
Improvedevice compatibilityVSAvoidtiming accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The boundary clock acts as a mediator that receives PTP packets with timestamps from the network and uses them to generate a clean, stable clock signal locally. This eliminates the timing jitter accumulated during packet transmission through the network, as the boundary clock regenerates the clock signal based on the timestamp information rather than directly using the packet timing

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The boundary clock creates a copy of the timing information from PTP packets and uses it to generate a new, clean clock signal. Instead of propagating the original PTP packets through the network, the boundary clock copies the timestamp data and reconstructs the clock signal, eliminating jitter from packet residence time variations

Inventive Principle:
Principle #26Copying

3Quantity of substance

If partial network upgrade to Sync-E is performed, then cost is reduced, but synchronization continuity deteriorates due to non-compliant nodes

Engineering Contradiction:
Improvenumber of Sync-E nodesVSAvoidsynchronization continuity
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The boundary clock serves as a gateway that enables synchronization continuity across protocol boundaries. It receives timing information from PTP-compliant upstream nodes and generates Sync-E signals for downstream nodes, allowing a seamless transition between different protocol domains and maintaining end-to-end synchronization

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments the network into different protocol domains (PTP domain upstream, Sync-E domain downstream) with the boundary clock as the interface. This segmentation allows each domain to operate with its native protocol while maintaining overall network synchronization through the boundary clock's protocol conversion capability

Inventive Principle:
Principle #1Segmentation

4Area of stationary object

If multiple PTP slaves are used, then clock distribution coverage is improved, but convergence time increases and system complexity increases

Engineering Contradiction:
Improveclock distribution coverageVSAvoidconvergence time
Core Design Contradiction:
Area of stationary objectVSLoss of time

Solution Approach 1:

The patent extracts the clock regeneration function from individual PTP slave nodes and concentrates it in boundary clock nodes. Instead of having multiple slaves throughout the network, the boundary clock extracts timing information from upstream PTP signals and redistributes it as Sync-E to multiple downstream nodes, reducing the total number of active slaves required

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS8630315B2Ethernet network synchronization systems and methods
Publication Date: 2014.01.14 CIENA CORP
  • US8630315B2 patent drawing
  • US8630315B2 patent drawing
  • US8630315B2 patent drawing

AI summary

The present disclosure relates to Ethernet synchronization systems and methods that combines Synchronous Ethernet (Sync-E) and Precision Time Protocol (PTP) IEEE 1588 algorithms. The present invention includes systems and methods for Ethernet networks and node configurations that include a set of rules on node placement, such as Boundary Clock (BC) nodes and Sync-E nodes, a clock selection algorithm, a holdover algorithm, and the like. Advantageously, the present invention provides an architecture that allows practical and real-world useful clock propagation through placement of BCs and Sync-E nodes for best performance. Practical experience and theoretical design are embodied in the present invention to define a very specific set of rules on how to build a network capable of providing accurate and reliable synchronization. The present invention includes clock selection that unifies Sync-E and 1588 algorithms.