Ethernet Clock Scaling for Reliable Inter-Processor Communication
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Solution Overview
Problem
Existing inter-processor communication technologies in automotive micro-controllers, such as Zipwire, rely on LFAST interfaces which may malfunction or fail, and alternative protocols like Ethernet interfaces do not provide satisfactory communication speeds and efficiency.
Innovation Solution
Implement direct Ethernet interface coupling between micro-controllers using a clock generator circuit to dynamically adjust the clock frequency based on operating parameters and frame exchange characteristics, enabling high-speed communication up to 200 Mbit/s without external network switches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If LFAST interface is used for inter-processor communication, then communication speed is improved, but reliability deteriorates due to malfunction and failure
Solution Approach 1:
The patent applies universality by using Ethernet interfaces, which are standard multi-functional communication interfaces already present in most micro-controllers, to perform inter-processor communication. This replaces the dedicated LFAST interface, allowing the same interface type to serve both external network communication and internal processor communication, thereby improving reliability while maintaining high communication speeds.
2Reliability
If Ethernet interface is used for inter-processor communication, then reliability is improved, but communication speed deteriorates
Solution Approach 1:
The patent applies dynamics by dynamically adjusting the clock frequency of the Ethernet interface based on the communication requirements. The system can operate at lower frequencies for normal traffic and switch to higher frequencies when high-speed communication is needed, thereby achieving both high reliability and high communication speed when required.
Solution Approach 2:
The patent changes the operating parameters of the Ethernet interface, specifically the clock frequency, to optimize communication speed. By adjusting the frequency parameter of the Ethernet interface, the system achieves high-speed communication (up to 200 Mbit/s) while maintaining the reliability benefits of using standard Ethernet interfaces.
3Productivity
If dedicated inter-processor communication interfaces are used, then communication efficiency is improved, but device complexity increases
Solution Approach 1:
The patent uses standard Ethernet interfaces that are already integrated into most micro-controllers, eliminating the need for dedicated inter-processor communication interfaces. This reduces device complexity while maintaining communication efficiency, as the same interface hardware and protocol stack can be used for both external network communication and internal processor communication.
Data Source
AI summary
An embodiment electronic system comprises a first device, a second device and a clock generator circuit. The clock generator circuit is configured to provide a clock signal having a selectable frequency. The first device comprises a first processing circuit having coupled therewith a first Ethernet interface, and the second electronic device comprises a second processing circuit having coupled therewith a second Ethernet interface. At least one of the first device and the second device is configured to determine a frequency of the clock signal as a function of an operating parameter of the first device and/or of the second device and/or as a function of a parameter of the frames exchanged between the first device and the second device, and to act on the clock generator circuit to operate the clock generator circuit at the frequency.