Optical Ethernet Clock Synchronization for Low-Jitter TDM Transport

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Solution Overview

Problem

Conventional Ethernet networks lack a mechanism for providing clock synchronization and distribution, making it difficult to support TDM traffic streams and resulting in high jitter and wander, which do not meet common carrier telecommunication standards, especially when transferring legacy TDM traffic over asynchronous networks.

Innovation Solution

A clock synchronization mechanism that extracts and adapts disparate clock rates from optical Ethernet signals to a common rate, selects a primary clock, and generates synchronized Ethernet output clocks, effectively turning an asynchronous Ethernet network into a synchronous one, suitable for distributing synchronous TDM data streams.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional asynchronous Ethernet networks are used to transfer TDM traffic, then network scalability and cost are improved, but clock synchronization quality deteriorates resulting in high jitter and wander

Engineering Contradiction:
Improvenetwork scalabilityVSAvoidclock synchronization quality
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent introduces a clock synchronization intermediary device that extracts clocks from received Ethernet packets, adapts them to a common rate, selects the best clock source, and regenerates synchronized clock signals. This intermediary mechanism enables asynchronous Ethernet networks to carry synchronous TDM traffic by mediating between the asynchronous network transport and the synchronous TDM requirements, thereby resolving the contradiction between network scalability and clock synchronization quality.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If SONET/SDH synchronous networks are used for clock distribution, then clock synchronization quality is improved, but device complexity and cost increase

Engineering Contradiction:
Improveclock synchronization qualityVSAvoidnetwork complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent replaces the complex SONET/SDH mechanical synchronous network infrastructure with an Ethernet-based system that uses packetized clock transport and software-controlled clock adaptation. Instead of requiring dedicated synchronous physical layers and complex SONET equipment, the invention uses standard Ethernet packets carrying clock information, processed by programmable clock adaptation logic, thereby achieving comparable synchronization quality with significantly reduced device complexity.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Adaptability or versatility

If multiple disparate clock rates are extracted from optical Ethernet signals, then adaptability to different Ethernet speeds is improved, but clock rate variation increases making synchronization difficult

Engineering Contradiction:
ImproveEthernet speed compatibilityVSAvoidclock rate consistency
Core Design Contradiction:
Adaptability or versatilityVSStability of the object's composition

Solution Approach 1:

The patent employs parameter change by extracting clock rates from Ethernet signals at different speeds (100Mbps, 1Gbps, 10Gbps) and systematically adapting them to a unified common clock rate through programmable division and synchronization. The system dynamically adjusts the clock adaptation parameters based on the input Ethernet speed, converting variable clock rates into consistent synchronized output clocks, thereby resolving the contradiction between Ethernet speed adaptability and clock rate consistency.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS7660330B1Clock synchronization and distribution over an optical Ethernet network
Publication Date: 2010.02.09 RPX CORP
  • US7660330B1 patent drawing
  • US7660330B1 patent drawing
  • US7660330B1 patent drawing

AI summary

A novel clock synchronization mechanism for recovering and distributing a centralized clock source synchronously over asynchronous networks such as optical Ethernet. A clock conversion scheme is provided whereby multiple clocks having diverse rates are converted to clock signals all having a common rate. One of the converted clocks is chosen and all downstream clock signals is derived from this clock. A high quality clock source located anywhere on the network is distributed throughout the network thus turning an asynchronous Ethernet network into a synchronous one. Synchronous TDM data streams can then be easily transported over the Ethernet network.