Ethernet Concatenated FEC Coding for High-Bandwidth Bit Errors

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Solution Overview

Problem

The increasing bandwidth requirements of Ethernet transmission systems, particularly in next-generation Ethernet 800G, lead to higher transmission bit errors, necessitating a coding method with improved error correction performance.

Innovation Solution

A concatenated coding scheme is employed, using a first FEC codeword, such as an RS codeword, followed by a second FEC codeword, like an inner-FEC codeword, to enhance error correction capabilities, with the encoder component of the inner-FEC codeword positioned at either the PCS or PMA layer, ensuring compatibility with existing Ethernet standards and reducing operational complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the transmission bandwidth is increased to meet growing network service throughput requirements, then the service bandwidth increases, but the transmission bit error rate increases

Engineering Contradiction:
Improveservice bandwidthVSAvoidtransmission bit error rate
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent divides the error correction function into two independent segments: outer FEC (Reed-Solomon code) and inner FEC (concatenated codes). This segmentation allows each code to specialize in different error correction scenarios, with the outer code handling burst errors and the inner code handling random errors, thereby improving overall reliability without sacrificing bandwidth

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs a composite coding structure by combining Reed-Solomon outer code with inner FEC codes (such as LDPC or Turbo codes). This composite approach creates a hierarchical error correction system where each layer addresses specific error types, achieving superior error correction performance at high bandwidths while maintaining compatibility with existing Ethernet standards

Inventive Principle:
Principle #40Composite materials

2Reliability

If a concatenated coding scheme with outer RS code and inner FEC code is adopted to improve error correction performance, then the error correction capability increases, but the coding complexity increases

Engineering Contradiction:
Improveerror correction performanceVSAvoidcoding complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent performs preliminary error correction by the outer RS code before the inner FEC code processes the data. This preliminary action reduces the error burden on the inner code, allowing it to operate more efficiently with simpler algorithms. The outer code pre-corrects obvious errors and detects error patterns, making the inner code's task easier and reducing overall computational complexity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The outer RS code acts as an intermediary between the data transmission channel and the inner FEC code. It provides a first layer of error protection and error detection that simplifies the workload for the inner code, effectively mediating the error correction process and reducing the computational burden on the more complex inner FEC algorithms

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If the encoder component of the inner-FEC codeword is positioned at the PCS or PMA layer to maintain compatibility with existing Ethernet standards, then the compatibility is maintained, but the implementation complexity increases

Engineering Contradiction:
Improvecompatibility with Ethernet standardsVSAvoidimplementation complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent designs the inner FEC encoder to be universally applicable across different Ethernet standards (100GE, 200GE, 400GE, and 800G) by positioning it at the PCS or PMA layer where it can handle various data rates and code configurations. This universal design allows a single implementation to serve multiple standards, reducing the need for separate specialized encoders for each standard and thereby reducing overall implementation complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP4228160B1Encoding method and apparatus for ethernet
Publication Date: 2025.10.01 HUAWEI TECH CO LTD
  • EP4228160B1 patent drawingFigure 1a~1b
  • EP4228160B1 patent drawingFigure 2
  • EP4228160B1 patent drawingFigure 3

AI summary

This application discloses an Ethernet coding method and apparatus, to adapt to a scenario in which a higher transmission bit error rate is caused by a high bandwidth. The method includes: A transmit end encodes first to-be-encoded information by using a first forward error correction FEC codeword, to obtain first encoded data, where the first forward error correction FEC codeword is a Reed-Solomon forward error correction RS-FEC code; and the transmit end encodes the first encoded data by using a second FEC codeword, to obtain second encoded data, where a code length N and an information bit length K of the second FEC codeword satisfy the following formula: M1 ∗ NK≤M2 (I), where M1 is a throughput of the first encoded data, and M2 is a throughput of the second encoded data.