Ethernet Interference Suppression Module for Silence-State Oscillations

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Solution Overview

Problem

Interference on the signal line of an Ethernet network degrades the signal-to-noise ratio of the received voltage signal, leading to unwanted oscillations on the receive pin, particularly in silence states.

Innovation Solution

An interference suppression module that includes circuitry to receive outputs from the receiver and energy detection modules, using gates and time-delay units to output a predefined logic state to the receive pin when the energy detection output is logic-low, effectively gating the receiver output during silence states to suppress interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the receiver module continuously monitors the received voltage signal, then the data reception capability is maintained, but unwanted oscillations occur on the receive pin during silence states due to interference

Engineering Contradiction:
Improvedata reception capabilityVSAvoidunwanted oscillations
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The interference suppression module acts as an intermediary between the receiver module and the receive pin. It receives the receiver output and the energy detection output, processes them through logic gates, and generates a suppressed output that is fed to the receive pin. This intermediary structure filters out unwanted oscillations while maintaining valid data reception during active states.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The energy detection module provides feedback about the signal state to the interference suppression module. When the energy detection output indicates a silence state (logic-low), the interference suppression module uses this feedback to gate the receiver output, preventing oscillations from reaching the receive pin while allowing data to pass through during active states.

Inventive Principle:
Principle #23Feedback

2Device complexity

If the receiver module operates without interference suppression, then the device complexity is lower, but the signal-to-noise ratio deteriorates due to interference on the signal line

Engineering Contradiction:
Improvecircuit structureVSAvoidsignal-to-noise ratio
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The interference suppression module merges the receiver output and energy detection output into a single processed signal that is fed to the receive pin. By combining these two inputs through AND/NAND gates, the system achieves interference suppression without requiring separate independent suppression circuits for each signal path.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The interference suppression module serves multiple functions: it suppresses interference during silence states, maintains data reception during active states, and does so using a universal logic gate structure (AND/NAND gates) that can be implemented with standard digital logic components, avoiding the need for specialized analog filtering circuits.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Device complexity

If the energy detection output directly controls the receive pin, then the interference suppression is simpler, but the receiver output cannot be properly transmitted during active states

Engineering Contradiction:
Improvecontrol circuit structureVSAvoiddata transmission accuracy
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The control circuit dynamically adjusts its behavior based on the energy detection output. When the energy detection output is logic-high (active state), the AND gate allows the receiver output to pass through to the receive pin. When the energy detection output is logic-low (silence state), the AND gate blocks the receiver output, preventing oscillations. This dynamic control ensures both interference suppression and data transmission accuracy.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The control circuit segments the operation into two distinct modes based on the energy detection output: an active state mode where receiver output is transmitted, and a silence state mode where interference is suppressed. The AND/NAND gates create distinct control paths for these two modes, allowing each to function optimally without interfering with the other.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12407425B2Interference suppression module and associated methods
Publication Date: 2025.09.02 NXP BV
  • US12407425B2 patent drawing
  • US12407425B2 patent drawing
  • US12407425B2 patent drawing

AI summary

An interference suppression module for an Ethernet transceiver, the interference suppression module comprising circuitry configured to: receive a receiver output from a receiver module of the Ethernet transceiver, the receiver module configured to output a logic-high when a received voltage signal is higher than a receiver threshold, and output a logic-low when the received voltage signal is lower than the receiver threshold; receive an energy detection output from an energy detection module of the Ethernet transceiver, the energy detection module configured to output a logic-high when the received voltage signal is higher than a positive energy detection threshold or lower than a negative energy detection threshold, and output a logic-low when the received voltage signal is between the positive and negative energy detection thresholds; and output a predefined logic state to a receive pin of the Ethernet transceiver when the energy detection output is a logic-low.