Multi-Lane Ethernet Data Processing for Continuous Alignment Markers
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Solution Overview
Problem
Current Ethernet architectures are limited to 100 G bandwidth and struggle to adapt flexibly to higher bandwidths, such as 400 G, leading to issues like misalignment of alignment markers (AMs) and incorrect decoding due to forward error correction (FEC) interference, especially when transmission bandwidth and serializer/deserializer (Serdes) matching is not proper.
Innovation Solution
The solution involves inserting alignment markers into a transcoded and scrambled data stream, adaptively allocating them across multiple physical coding sublayer (PCS) lanes, performing FEC encoding, and ensuring each physical medium attachment sublayer (PMA) lane receives continuous AMs, using techniques like bit width conversion and slicing to maintain AM integrity across higher bandwidths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If Ethernet architecture uses 100 G processing bandwidth with standard PCS layer modules, then encoding and decoding can be performed correctly, but the architecture cannot be flexibly adapted to higher bandwidths such as 400 G
Solution Approach 1:
The patent segments the data stream into multiple lanes (e.g., 4 lanes for 400G) and processes each lane independently through separate PCS layers. Each lane receives its own alignment markers and undergoes independent FEC encoding/decoding, allowing the system to scale to higher bandwidths by simply adding more lanes rather than redesigning the entire architecture.
Solution Approach 2:
The patent creates a universal PCS layer architecture that can handle multiple bandwidth rates (100G, 400G, and potentially higher) using the same fundamental structure. The alignment marker insertion and lane allocation mechanisms are designed to be rate-agnostic, enabling the system to adapt to different bandwidth requirements without requiring separate dedicated architectures for each rate.
2Reliability
If alignment markers are inserted into the data stream for lane alignment, then lane remapping can be performed at the receive end, but forward error correction encoding may disorganize the AM patterns making them unidentifiable
Solution Approach 1:
The patent inserts alignment markers into the data stream at the transmit end before FEC encoding is applied. By establishing the AM patterns and lane allocation in advance, the receive end can reliably identify lane boundaries and perform remapping even after FEC processing, as the AMs serve as pre-established reference points that survive the encoding process.
Solution Approach 2:
The alignment markers act as intermediary reference elements between the physical layer data stream and the higher-layer processing. These markers are inserted at specific intervals and positions that allow them to serve as mediators for lane identification and alignment, enabling the receive end to correctly interpret the FEC-encoded data without the markers being lost or confused by the encoding process.
3Productivity
If data is transmitted across multiple PCS lanes to achieve higher bandwidth, then transmission capacity increases, but maintaining continuous and complete alignment markers across all lanes becomes difficult
Solution Approach 1:
The patent divides the high-speed data stream into multiple parallel lanes (e.g., 4 lanes for 400G transmission), with each lane carrying a portion of the data and its own set of alignment markers. This segmentation allows the system to achieve higher aggregate bandwidth while maintaining the integrity and continuity of alignment markers within each individual lane, as each lane is independently aligned and processed.
Solution Approach 2:
The patent transitions from single-lane to multi-lane transmission, adding a spatial dimension to the data flow. By distributing data across multiple lanes and inserting alignment markers in each lane at calculated positions, the system maintains marker continuity in the temporal dimension while exploiting the spatial dimension (multiple lanes) to achieve higher bandwidth. The receive end remaps data from multiple lanes back to the original sequence.
Data Source
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Figure 2-b~3
Figure 4-a~4-b
AI summary
Disclosed are a data processing method, a data transmit end, and a data receive end. The data processing method includes: inserting multiple AMs into a first data stream, where the first data stream is a data stream that is transcoded and scrambled after being encoded at a physical layer, and a transmission rate of the first data stream is greater than or equal to 100 GPS; adaptively allocating the first data stream that includes the AMs to multiple physical coding sublayer PCS lanes to obtain second data streams; performing FEC encoding on the second data streams on the multiple PCS lanes to obtain third data streams; and delivering the third data streams to multiple physical medium attachment sublayer PMA lanes according to an input bit width of a serializer/deserializer Serdes to obtain multiple fourth data streams, where the multiple fourth data streams are in a one-to-one correspondence with the multiple PMA lanes, each fourth data stream includes at least one complete and continuous AM, and the at least one AM is an AM in the multiple AMs.