Ethernet Lane Mapping to Limit Burst Errors in FEC
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Solution Overview
Problem
Existing Ethernet data transmission systems suffer from low reliability due to the spread of burst errors during bit multiplexing processing, leading to reduced success rates in forward error correction and overall data integrity.
Innovation Solution
The method involves demultiplexing and mapping data streams at a granularity of n bits to form z streams, which are then output, reducing the spread of burst errors and improving FEC symbol error correction performance by converting burst errors into fewer FEC symbol errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If bit multiplexing processing is performed to map data streams to multiple lanes, then data transmission capacity is improved, but burst errors are spread across more symbols reducing transmission reliability
Solution Approach 1:
The patent segments the data stream into multiple parallel sub-streams before mapping to different lanes. By dividing the original data stream into N separate streams and mapping them to N different lanes, the patent prevents burst errors from affecting all lanes simultaneously, thus maintaining transmission reliability while preserving data transmission capacity through parallel processing
Solution Approach 2:
The patent introduces a new dimension of processing by performing operations at the symbol level rather than bit level. By mapping symbols (groups of bits) to multiple lanes and performing demultiplexing at the symbol level, the patent changes the operational dimension from individual bits to grouped symbols, which reduces error propagation while maintaining overall transmission capacity
2Adaptability or versatility
If demultiplexing is performed at bit granularity to obtain multiple data streams, then mapping flexibility is improved, but error symbols increase reducing FEC correction success rate
Solution Approach 1:
The patent changes the granularity parameter from bit-level to symbol-level processing. By performing demultiplexing and mapping operations at the symbol level (where one symbol equals N bits) rather than at individual bit level, the patent maintains mapping flexibility for different lane configurations while reducing the number of error symbols that FEC must correct, thereby improving correction success rate
Data Source
AI summary
A data transmission method, apparatus, and system are applied to the field of communication technologies. The method includes: performing demultiplexing processing on obtained y first data streams to obtain x second data streams, where the y first data streams are obtained through bit multiplexing processing; mapping the x second data streams at a granularity of n bits to obtain z third data streams; and outputting the z third data streams over an output lane, where y, x, n, and z are all positive integers, and n≥2. The method may be applied to an Ethernet high-speed interface.