Ethernet MAC Retransmission Control for Low-BER Data Links

The patent segments the error correction function into two distinct parts: Forward Error Correction (FEC) for handling minor errors, and Automatic Repeat Request (ARQ) for handling uncorrectable errors. This segmentation allows each mechanism to operate optimally within its capability range, avoiding the need to over-provision FEC check packets for all error scenarios, thus reducing overall computational complexity while maintaining reliability.

The patent introduces an intermediary mechanism (ARQ retransmission) that works in conjunction with FEC. When FEC fails to correct errors, the ARQ mechanism steps in as an intermediary to request retransmission. This intermediary approach prevents the system from relying solely on increased FEC overhead, thereby reducing computational complexity while maintaining the link bit error rate within acceptable thresholds.

The patent segments the error handling responsibility between FEC (handling correctable errors with minimal overhead) and ARQ (handling uncorrectable errors through selective retransmission). This segmentation ensures that check data packets are only used for their intended purpose of correcting minor errors, while the ARQ mechanism handles significant errors without requiring additional overhead packets, thus reducing total link overheads.

The patent implements a discard-and-recover strategy where severely corrupted data packets that cannot be corrected by FEC are discarded and requested for retransmission via ARQ. This approach prevents the wasteful use of additional check packets for packets that would require excessive overhead to correct, thereby optimizing the balance between reliability and link overheads.

The patent segments the error protection mechanism into FEC for high-speed operation with minimal latency and ARQ for ensuring reliability when errors occur. This allows the system to maintain high link rates for productivity while having a reliable fallback mechanism to handle the increased bit error rate that naturally occurs at higher speeds, thus resolving the contradiction between speed and reliability.

The patent implements feedback through the ARQ mechanism where the receiver provides acknowledgment or negative acknowledgment to the transmitter based on whether data packets were successfully decoded. This feedback loop allows the system to maintain high link rates by quickly identifying and retransmitting only the erroneous packets, rather than reducing the overall link rate, thus preserving productivity while ensuring reliability.