Ethernet Traffic Management with Deterministic Multi-Threaded Micro-Controllers
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Solution Overview
Problem
Current Ethernet traffic management solutions for industrial applications, such as those in the automotive and substation automation sectors, face challenges in efficiently managing packet data traffic in daisy-chain or ring topologies, particularly in ensuring redundancy and low latency while supporting multiple protocols like PROFINET IRT, ETHERCAT, and HSR, without compromising on infrastructure costs or performance.
Innovation Solution
A deterministic multi-threaded micro-controller based Ethernet traffic management device with three ports, each controlled by a separate deterministic micro-controller, allowing for cooperative data packet communication, independent memory access, and flexible topology configurations, including line, ring, and redundant star topologies, to manage packet data efficiently and reduce latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If two-port switches are used for daisy-chain networking, then infrastructure costs are reduced and installation is simplified, but network redundancy and reliability are compromised
Solution Approach 1:
The switch device is designed to perform multiple functions: it can operate as a two-port switch for daisy-chain networking, as a three-port switch for star topology, and support multiple industrial Ethernet protocols (PROFINET IRT, ETHERCAT, HSR, SERCOS III) simultaneously. This multi-functionality allows a single device to replace multiple specialized devices, reducing infrastructure costs while maintaining reliability through configurable topologies and protocol support
2Productivity
If deterministic multi-threaded micro-controllers are used for each port, then packet data management efficiency and latency are improved, but device complexity increases
Solution Approach 1:
The switch device divides its control architecture into three separate deterministic multi-threaded micro-controllers, with each micro-controller dedicated to a specific port. This segmentation allows each port to be managed independently with deterministic timing, improving packet data management efficiency and reducing latency. The segmentation also enables parallel operation of multiple protocols simultaneously without interference
Solution Approach 2:
A shared memory system serves as an intermediary between the three deterministic micro-controllers, enabling efficient communication and coordination while maintaining independence. The shared memory allows packets to be transferred between ports through a common buffer, reducing the need for complex direct communication channels between micro-controllers and simplifying the overall architecture
3Adaptability or versatility
If multiple industrial protocols are supported simultaneously, then protocol versatility is improved, but traffic management complexity and processing overhead increase
Solution Approach 1:
Each deterministic multi-threaded micro-controller is configured to handle specific industrial Ethernet protocols on its assigned port. This segmentation allows protocol-specific processing to be localized to individual ports, reducing the processing overhead on other ports and enabling simultaneous support for multiple protocols without overwhelming the central control architecture
Solution Approach 2:
The switch device implements protocol-specific processing at each port level rather than centralized processing. Each micro-controller has local intelligence to handle protocol-specific tasks such as PROFINET IRT isochronous communication, ETHERCAT real-time processing, HSR ring redundancy, and SERCOS III synchronization locally, reducing traffic management complexity and improving overall system performance
4Device complexity
If a shared memory system is used for packet routing, then device complexity is reduced and cost is lowered, but memory access interference and latency may increase
Solution Approach 1:
The shared memory system is designed to allow continuous packet routing operations without interruption. Multiple deterministic micro-controllers can access the shared memory simultaneously with guaranteed bandwidth allocation, ensuring that memory access operations continue without interference or latency spikes. The deterministic nature of the controllers ensures predictable memory access timing
Data Source
AI summary
An improved Ethernet traffic management device is provided comprising. a first port, a second port, and a third port. The device further comprises a first deterministic multi-threaded micro-controller controlling traffic through the first port, a second deterministic multi-threaded micro-controller controlling traffic through the second port, and a third deterministic multi-threaded micro-controller controlling traffic through the third port. The first deterministic multi-threaded micro-controller, second deterministic multi-threaded micro-controller, and third deterministic multi-threaded micro-controller cooperatively operate to selectively communicate data packets between each of the first, second and third ports.