Ethernet-OTN Clock Synchronization via Asynchronous Mapping

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current Optical Transport Network (OTN) standards for Ethernet data traffic lack synchronization between Ethernet and OTN timing, requiring additional equipment and complex synchronization circuits, which increases costs and complexity.

Innovation Solution

A transceiver system with clock recovery circuits, synchronizers, and asynchronous mappers that recover and multiply clocks by integer ratios to synchronize Ethernet and OTN signals, enabling transparent timing changes at boundary nodes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If GFP-F mapping is used to terminate Ethernet packets, then Ethernet data traffic can be transported over OTN, but synchronization between Ethernet timing and OTN timing is lost

Engineering Contradiction:
ImproveEthernet transport capabilityVSAvoidtiming synchronization
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent introduces an intermediary mechanism (asynchronous mapping with rate adaptation) between Ethernet packets and OTN frames to preserve timing information. The system uses a buffer and rate adapter as intermediaries that allow asynchronous operation while maintaining timing relationships through metadata and control signals.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent adds a temporal dimension to the mapping process by introducing time-stamping and rate adaptation mechanisms. Instead of simple spatial mapping, the system tracks timing across different time bases using additional control dimensions (timing metadata, rate indication fields) to maintain synchronization awareness.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If extra equipment is added to provide stratum timing at egress, then timing synchronization is achieved, but equipment cost and operating cost increase

Engineering Contradiction:
Improvetiming synchronizationVSAvoidequipment quantity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system enables self-service timing where the OTN network itself provides timing references to Ethernet clients through the mapped frames. The timing information is embedded within the data stream through the asynchronous mapping mechanism, eliminating the need for separate external timing equipment.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent makes the OTN transport system multi-functional by enabling it to simultaneously transport data and provide timing synchronization services. The same mapping infrastructure that handles data transport also delivers timing information, consolidating multiple functions into a single system.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If external stratum synchronized timing is added, then timing synchronization is provided, but stringent timing wander requirements must be met

Engineering Contradiction:
Improvetiming synchronizationVSAvoidtiming wander control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent implements prior cushioning through buffer mechanisms that absorb timing variations and wander before they propagate through the system. The asynchronous mapping buffer acts as a cushion that isolates timing disturbances, preventing them from affecting the synchronized timing relationship.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

4Manufacturing precision

If stratum synchronization circuits are added to address wander requirements, then timing wander is controlled, but system complexity and cost increase

Engineering Contradiction:
Improvetiming wander controlVSAvoidsynchronization circuit complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent replaces complex mechanical/electrical stratum synchronization circuits with a software-based or logic-based asynchronous mapping system. The timing control is achieved through digital signal processing and protocol manipulation rather than dedicated hardware synchronization circuits.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS9143142B2Transparent timing of a stratum synchronized ethernet signal using standard optical transport network rates
Publication Date: 2015.09.22 CIENA CORP
  • US9143142B2 patent drawing
  • US9143142B2 patent drawing
  • US9143142B2 patent drawing

AI summary

A method and system for transparent timing of an Ethernet signal over an optical transport network are disclosed. In one embodiment, a transceiver includes a first clock recovery circuit, a first synchronizer and an asynchronous mapper. The first clock recovery circuit recovers a first clock from a first signal received from an Ethernet network. The first synchronizer multiplies the first clock by a ratio M/N to produce a second clock to time a second signal transmitted over the optical transport network. M and N are integers. The asynchronous mapper maps frames of the first signal to produce frames of the second signal.