Ethernet PDH Clock Recovery via Virtual Container Mapping
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Solution Overview
Problem
In hybrid Ethernet and SDH networks, recovering the clock frequency of PDH frame data is challenging, leading to increased jitter and drift, which degrades the quality of service and user experience due to the need for multiple stages of clock frequency recovery and remapping.
Innovation Solution
The method involves direct virtual-container mapping processing on PDH frame data without obtaining the actual clock frequency, using a stuffing bit to reflect the clock frequency difference between Ethernet and PDH frequencies, and incorporating alarm information in the path overhead to improve data processing efficiency and reduce clock frequency jitters and drifts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple stages of clock frequency recovery and remapping are performed on PDH frame data, then the clock frequency can be recovered accurately, but jitter and drift increase, degrading service quality
Solution Approach 1:
The patent extracts only the necessary clock frequency difference information from the PDH frame data and carries it in the stuffing bit of the virtual container, rather than performing complete multiple-stage clock frequency recovery. This extraction approach maintains the essential timing information while avoiding the jitter and drift accumulation that would result from multiple processing stages.
Solution Approach 2:
The patent segments the clock frequency recovery process by carrying the clock frequency difference information separately in the stuffing bit, allowing the receiving end to perform a single-stage recovery calculation rather than multiple sequential recovery stages. This segmentation reduces the cumulative jitter and drift that would occur in multi-stage processing.
2Device complexity
If direct virtual-container mapping processing is performed on PDH frame data without obtaining actual clock frequency, then processing complexity is reduced, but clock frequency difference information must be preserved accurately
Solution Approach 1:
The patent uses the stuffing bit as an intermediary to carry the clock frequency difference information between the sending and receiving ends. This intermediary mechanism allows the system to perform simplified direct virtual-container mapping while preserving the essential clock frequency difference information needed for accurate frequency recovery at the receiving end.
Solution Approach 2:
The patent changes the representation of clock frequency information from actual clock frequency values to clock frequency difference values encoded in the stuffing bit. This parameter transformation simplifies the processing complexity while maintaining the accuracy of clock frequency recovery, as the difference information is sufficient for the receiving end to reconstruct the original frequency.
3Adaptability or versatility
If PDH frame data is transmitted through Ethernet network elements, then network flexibility and scalability are improved, but clock frequency recovery becomes more challenging compared to direct SDH connections
Solution Approach 1:
The patent performs preliminary encoding of the clock frequency difference information into the stuffing bit of the virtual container at the sending end before Ethernet transmission. This preliminary action ensures that the essential timing information is preserved throughout the Ethernet network traversal, making clock frequency recovery feasible even though the data passes through multiple Ethernet network elements rather than a direct SDH connection.
Data Source
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AI summary
Embodiments of this application disclose a data processing method, a related device, and a system. The method in the embodiments of this application includes: receiving, by a first network device, PDH frame data; performing, by the first network device, virtual-container mapping processing on the PDH frame data: loading the PDH frame data and a stuffing bit into a virtual container, to obtain the virtual container that includes the PDH frame data, where the stuffing bit in the virtual container carries information about a clock frequency difference between a clock frequency of the Ethernet and a clock frequency of the PDH frame data; and performing, by the first network device, virtual-container pseudo-wire emulation edge-to-edge PWE3 encapsulation on the virtual container to obtain a virtual-container PWE3 packet. According to the embodiments of this application, difficulty in recovering the clock frequency of the PDH frame data when the PDH frame data is transmitted in the Ethernet is reduced, clock frequency jitters and drifts caused by the clock frequency recovery are reduced, and user experience is improved.