Ethernet PHY Common-Mode Compensation With Adaptive Transconductance Clamping
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Solution Overview
Problem
Existing common-mode disturbance compensation methods in Ethernet physical layers suffer from high power consumption and limited dynamic range, leading to signal integrity issues, especially in low voltage designs, due to the lack of adaptive control and accurate common-mode reference.
Innovation Solution
Implementing at least two identical transconductance circuits in parallel, which are selectively enabled or disabled based on the comparison of output voltage signals with a reference, allowing for adaptive common-mode compensation strength adjustment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a static common-mode clamping circuit is used, then the circuit structure is simple, but the power consumption is high and signal integrity is limited
Solution Approach 1:
The patent applies dynamics by making the common-mode clamping circuit adaptive rather than static. Multiple transconductance circuits with different clamping strengths are selectively enabled based on the detected common-mode disturbance level, allowing the system to dynamically adjust its operation to minimize power consumption while maintaining signal integrity.
Solution Approach 2:
The patent changes the parameter of clamping strength by using multiple transconductance circuits with different gain values. The system selects which circuits to enable based on the measured common-mode voltage, thereby adapting the clamping parameter to match the actual disturbance level and reduce unnecessary power consumption.
2Device complexity
If a static common-mode clamping circuit is used, then the circuit structure is simple, but the signal integrity is poor
Solution Approach 1:
The system dynamically adjusts the common-mode clamping strength based on the detected disturbance level. When large disturbances are detected, stronger clamping circuits are enabled to maintain signal integrity. When disturbances are small, weaker or no clamping is applied to avoid degrading signal integrity through excessive clamping.
Solution Approach 2:
The patent uses multiple transconductance circuits with different clamping strength parameters. By selectively enabling circuits with appropriate gain values based on the measured common-mode voltage, the system optimizes signal integrity for different operating conditions rather than using a fixed clamping parameter.
3Reliability
If transconductance circuits are constantly biased, then the common-mode compensation is continuous, but the DC power consumption increases
Solution Approach 1:
Instead of continuous biasing, the patent uses periodic or conditional activation of transconductance circuits based on detected common-mode disturbances. The system monitors the common-mode voltage and enables compensation circuits only when disturbances are detected, reducing DC power consumption while maintaining compensation continuity when needed.
Solution Approach 2:
The patent changes the operational state parameter of transconductance circuits from constantly biased to selectively biased. By adjusting the biasing parameter based on the measured common-mode voltage level, the system maintains compensation effectiveness while minimizing DC power consumption during normal operating conditions.
4Power
If large transistors are used for high current driving capability, then the current output is sufficient, but the capacitive load increases and signal integrity deteriorates
Solution Approach 1:
The patent uses multiple transconductance circuits with different current output parameters. By selectively enabling circuits with appropriate current capabilities based on the disturbance level, the system provides sufficient current for large disturbances while using smaller current outputs for minor disturbances, thereby reducing the capacitive load effect on signal lines and maintaining signal integrity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Reduces DC power consumption and improves signal integrity by dynamically adjusting common-mode clamping strength, addressing the limitations of static implementations.
Implementation Method 1
providing the output voltage signal and a reference voltage signal to at least two identical transconductance circuits, which are connected in parallel to the media dependent interface, wherein each transconductance circuit: compares the output voltage signal with the reference voltage signal, generates a compensation current signal based on the result of the comparison
Data Source
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AI summary
The invention relates to a method for adaptive common-mode disturbance compensation in ethernet physical layers, comprising the steps of: measuring a voltage signal of a media dependent interface of the ethernet physical layer; generating an output voltage signal based on the measured voltage signal of the media dependent interface; providing the output voltage signal and a reference voltage signal to at least two identical transconductance circuits, which are connected together to the media dependent interface, wherein each transconductance circuit: compares the output voltage signal with the reference voltage signal, generates a compensation current signal based on the result of the comparison of the output voltage signal with the reference voltage signal, and provide the compensation current signal to the media dependent interface; and selectively enabling and/or disabling one or more of the at least two transconductance circuits, until the output voltage signal equals to the reference voltage signal.