Ethernet PHY Time Synchronization Using AM Timestamps

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Solution Overview

Problem

Existing Ethernet 1588 synchronization methods suffer from uncertain delays and low precision, particularly in environments where traditional GPS synchronization is limited by cost and environmental factors, failing to achieve the required 10 nanosecond precision needed for 5G wireless communication.

Innovation Solution

Adding timestamps to the alignment mask (AM) of the physical coding sublayer (PCS) instead of the 1588 event message header, allowing for precise time synchronization by controlling the transmission of 1588 event messages within specific time windows defined by AM generation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional GPS synchronization methods are used, then cost and environmental adaptability are improved, but synchronization precision deteriorates (cannot achieve 10 nanoseconds)

Engineering Contradiction:
Improvesynchronization precisionVSAvoidcost and environmental constraints
Core Design Contradiction:
Measurement precisionVSEase of manufacture

Solution Approach 1:

The patent introduces an intermediary mechanism (alignment marker with timestamp) between the master clock and slave clock to enable precise time synchronization over Ethernet without requiring GPS infrastructure. The alignment marker carries timestamp information that mediates the time difference calculation between clocks, achieving high precision synchronization through a different technical pathway that avoids GPS's environmental and cost limitations

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the synchronization parameter from GPS-based coarse synchronization to Ethernet-based fine synchronization by introducing timestamp measurement at the physical layer. By measuring the time difference based on alignment markers with nanosecond-level timestamps and compensating for propagation delays, the system achieves 10 nanosecond precision through parameter transformation rather than relying on GPS infrastructure

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If Ethernet 1588 synchronization is used, then cost and adaptability are improved, but synchronization precision deteriorates (limited to tens of nanoseconds to microseconds due to uncertain delays)

Engineering Contradiction:
Improvesynchronization precisionVSAvoiduncertain delays
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent applies preliminary action by pre-defining specific measurement points in the data transmission path (alignment marker generation point and reception point) and pre-calculating the propagation delay between these points. By establishing the delay characteristic in advance and using it for compensation, the system eliminates the uncertainty that normally plagues Ethernet synchronization, achieving reliable sub-10-nanosecond precision

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent substitutes the traditional 1588 event message header timestamping mechanism with a new approach that timestamps alignment markers at the physical coding sublayer boundary. This replacement changes the measurement mechanism from layer 2/3 processing to layer 1/2 boundary measurement, eliminating the uncertain delays introduced by higher-layer processing and achieving more reliable precision

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Measurement precision

If timestamps are added to 1588 event message header, then synchronization function is implemented, but delay errors increase due to bottom layer uncertainties

Engineering Contradiction:
Improvetime synchronization accuracyVSAvoiddelay errors
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent extracts the timestamping function from the 1588 event message header (layer 2/3) and relocates it to the alignment marker at the physical coding sublayer boundary (layer 1/2). By separating the timestamping operation from higher-layer processing and placing it at the physical layer boundary, the system eliminates the delay errors introduced by intermediate processing layers while maintaining the synchronization function

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentEP4064589B1Ethernet time synchronization method and apparatus
Publication Date: 2026.01.28 SANECHIPS TECH CO LTD
  • EP4064589B1 patent drawingFigure 1~2
  • EP4064589B1 patent drawingFigure 3~4
  • EP4064589B1 patent drawingFigure 5~6

AI summary

The present invention provides a method and an apparatus for time synchronization of Ethernet. The method includes: adding a timestamp to an alignment mask (AM) signal at an interface between a physical coding sublayer (PCS) and a physical medium attachment (PMA) in a physical layer (PHY) of Ethernet; carrying the AM timestamp in a corresponding 1588 event message; and performing time synchronization according to the AM timestamp carried in a transmitted or received 1588 event message. In the present invention, the timestamp is added to the AM signal with a fixed period at the interface between the PCS and the PMA in the PHY, such that influence of a delay error in the PCS is eliminated and time synchronization precision is improved.