Ethernet PHY Data Distribution for Flexible Bandwidth Configuration
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Solution Overview
Problem
Current Ethernet interface designs require multiple hardware types for different rates, leading to a heavy workload and increased costs due to the need for various chip designs, and existing fixed-rate single-port Ethernet interfaces struggle to meet complex bandwidth requirements.
Innovation Solution
A data distribution method that processes packet streams into data block streams, which are then distributed to multiple physical layer circuits for encoding, scrambling, and alignment marker insertion, allowing for flexible bandwidth configuration and resource reuse by selectively enabling only necessary circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple types of physical subboards and Ethernet interface chips are designed for different rates, then different bandwidth requirements can be met, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent implements a universal physical subboard design where a single type of subboard can support multiple Ethernet interface rates (10GE, 25GE, 40GE, 100GE) through software configuration and dynamic resource allocation. The subboard includes multiple Ethernet interface chips that can be selectively activated based on the required bandwidth, eliminating the need for separate hardware designs for each rate.
Solution Approach 2:
The patent introduces dynamic bandwidth allocation mechanisms where the Ethernet interface rate can be changed at runtime through software control. The system can dynamically activate or deactivate specific interface chips and adjust bandwidth allocation based on real-time network requirements, transforming a static hardware design into a flexible, reconfigurable system.
2Adaptability or versatility
If multiple types of physical subboards are prepared for different rates, then various bandwidth modes are supported, but investment and workload multiply
Solution Approach 1:
The patent creates a universal subboard platform that can be manufactured in large quantities for a single rate configuration, then dynamically reconfigured through software to support multiple rates. This approach allows standardization of the manufacturing process while maintaining versatility in the field, significantly reducing manufacturing workload and inventory complexity.
3Device complexity
If fixed-rate single-port Ethernet interfaces are used, then hardware design is simplified, but complex bandwidth requirements cannot be met
Solution Approach 1:
The patent divides the Ethernet interface functionality into multiple independent interface chips on a single subboard, each capable of operating at different rates. The system can selectively activate specific chips and combine their capacities to meet various bandwidth requirements, maintaining simple individual chip designs while achieving complex aggregate bandwidth capabilities.
Data Source
Figure 1
Figure 2-a
Figure 2-b~2-c
AI summary
A data distribution method, a data aggregation method, and related apparatuses are disclosed. The data distribution method may include: receiving a first packet stream; dividing the first packet stream to obtain a first data block stream; sending the first data block stream to a first circuit; processing, by the first circuit, the first data block stream to obtain a first data stream; distributing, by the first circuit, the first data stream to N1 second circuits of M second circuits in a PHY, where M is greater than N1, N1 is a positive integer, and M is a positive integer; and processing, by the N1 second circuits, the received first data stream to obtain N1 first code streams. The technical solutions provided by the embodiments of the present invention help to meet a requirement for complex bandwidth configuration and extend an application scenario.