Ethernet Receiver FEC Reconfiguration for Variable Bit Error Rates

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Solution Overview

Problem

Existing Ethernet communication systems face challenges in adapting to varying bit error ratios due to environmental interference and human-induced factors, leading to high bit error rates that conventional forward error correction methods struggle to address effectively.

Innovation Solution

A method and apparatus that dynamically adjust the error correction capability of Ethernet data streams by utilizing a receiver apparatus with multiple FEC decoders and interleavers, enabling flexible configurations based on transmission information such as bit error ratios and error quantities to optimize performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a concatenated code with multiple FEC decoders is configured to handle high bit error ratios, then error correction capability is improved, but device complexity increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements dynamic adjustment of error correction capability by enabling or disabling the first FEC decoder and first de-interleaver based on real-time bit error ratio thresholds. When BER is below a first threshold, the full concatenated code (both FEC decoders) is activated for maximum error correction. When BER exceeds the threshold, the system dynamically switches to using only the second FEC decoder, reducing complexity while maintaining adequate error correction for the current channel conditions.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes operational parameters (which FEC decoders are active) based on the bit error ratio parameter. By monitoring BER and comparing it against predefined thresholds, the system adjusts the error correction configuration to match actual channel quality, thereby optimizing the balance between reliability and device complexity.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a concatenated code with multiple FEC decoders is used to address high bit error ratios, then reliability is improved, but adaptability to varying transmission scenarios deteriorates

Engineering Contradiction:
Improveerror correction capabilityVSAvoidadaptability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The system dynamically adapts its error correction configuration based on real-time channel conditions measured by bit error ratio. Multiple operational modes are supported: full concatenated code mode for high BER scenarios, partial mode (second FEC decoder only) for moderate BER, and minimal mode for low BER. This dynamic adaptation enables the system to effectively handle diverse transmission scenarios ranging from poor to excellent channel conditions.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The receiver apparatus is designed with multi-functionality to support different error correction configurations within a single system. The same hardware infrastructure (FEC decoders, de-interleavers) can operate in multiple modes depending on channel conditions, making the system universally applicable to various transmission scenarios without requiring separate specialized systems.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If full error correction processing is always applied, then reliability is improved, but processing time and resource consumption increase

Engineering Contradiction:
Improveerror correction capabilityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system dynamically adjusts processing intensity based on channel conditions. When BER is low, the system skips the first FEC decoder and first de-interleaver, applying only minimal error correction (second FEC decoder), thereby reducing processing time and resource consumption. When BER is high, the full error correction processing chain is activated to ensure reliability. This dynamic approach prevents unnecessary processing overhead in good channel conditions.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the error correction processing parameter (which decoders are active) based on the BER parameter. By adjusting this parameter according to actual channel quality, the system optimizes the trade-off between reliability and processing time, avoiding excessive processing when it is not needed while ensuring adequate protection when channel conditions deteriorate.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP4672648A1Method and apparatus for processing ethernet data stream, and computer system and network system
Publication Date: 2025.12.31 HUAWEI TECH CO LTD
  • EP4672648A1 patent drawingFigure 1~2B
  • EP4672648A1 patent drawingFigure 2C
  • EP4672648A1 patent drawingFigure 2D

AI summary

A method and an apparatus for processing an Ethernet data stream, a computer system, a network system, and a computer-readable storage medium are disclosed. The method is applied to a receiver apparatus including a first forward error correction FEC decoder and a second FEC decoder. The method includes: obtaining transmission information of a first data stream; and if the transmission information meets a trigger condition, adjusting an error correction capability of the receiver apparatus. The data stream can be flexibly and effectively processed by using the method, the apparatus, the computer system, the network system, and the computer-readable storage medium.