Ethernet Synchronization Packet Routing to Prevent Timing Loops

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Existing solutions for preventing timing loops in Ethernet networks are inadequate when the number of Network Elements (NEs) exceeds 16, and can fail to detect loops in sub-networks, leading to synchronization issues.

Innovation Solution

A method and device that includes generating a local synchronization packet with a unique identifier for network devices with multiple inputs and one output, and dropping packets without the identifier to prevent timing loops, while allowing synchronization with identified sources.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the reserved bits (4 bits) are used to store clock source identifiers, then timing loop prevention is achieved for small networks, but the solution becomes inadequate when the number of Network Elements exceeds 16

Engineering Contradiction:

Improvetiming loop prevention effectivenessVSAvoidnetwork scale adaptability

Core Design Contradiction:

ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent transitions from using a fixed 4-bit identifier system to a flexible identifier system that can accommodate arbitrary-length identifiers. This dimensional change in identifier capacity allows the system to scale from small networks (≤16 NEs) to large networks (＞16 NEs) without fundamental redesign, resolving the contradiction between timing loop prevention reliability and network scale adaptability.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent changes the parameter of identifier length from fixed (4 bits) to variable (flexible length). This parameter change enables the system to adapt to different network scales by adjusting identifier capacity as needed, while maintaining the core timing loop prevention mechanism intact, thus resolving the contradiction between reliability and adaptability.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If the clock source identifier is used to prevent timing loops, then loops are prevented when the NE receives its own identifier, but timing loops cannot be detected in sub-networks where the identifier does not match the receiving NE's ID

Engineering Contradiction:

Improvetiming loop detection accuracyVSAvoidsub-network loop detection capability

Core Design Contradiction:

ReliabilityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent introduces a path identifier as an intermediary element that tracks the transmission path of synchronization packets through multiple network elements. This intermediary mechanism allows detection of timing loops in sub-networks by identifying when a packet returns to its origin through the recorded path, rather than relying solely on clock source identifier matching, thus resolving the contradiction between detection accuracy and sub-network detection capability.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements a feedback mechanism where network elements record and trace the path of synchronization packets through the network. When a packet returns to an element that has already processed it, the feedback loop is detected and the timing loop is identified. This feedback approach enables comprehensive loop detection across all network configurations, resolving the limitation of sub-network detection.

Inventive Principle:

Principle #23Feedback

3Measurement precision

If network devices continuously monitor and adjust clock sources to prevent timing loops, then synchronization accuracy is maintained, but device complexity and processing overhead increase

Engineering Contradiction:

Improvesynchronization accuracyVSAvoidloop prevention mechanism complexity

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by having network elements record path identifiers and clock source information in advance as synchronization packets traverse the network. This pre-recording of path information enables rapid loop detection without requiring complex real-time analysis, thus maintaining high synchronization accuracy while reducing processing overhead and device complexity.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent uses copying by replicating path identifier and clock source information throughout the synchronization packet as it traverses the network. This copying mechanism allows any network element to independently verify loop conditions by examining the copied path information, eliminating the need for complex centralized monitoring and reducing individual device complexity while maintaining overall synchronization accuracy.

Inventive Principle:

Principle #26Copying

Data Source

PatentUS12574878B2Network device and method of preventing timing loop

Publication Date: 2026.03.10 UFI SPACE CO LTD

AI summary

A method of preventing a timing loop and a network device are provided. The method of preventing the timing loop includes receiving a source synchronization packet by a network device; retrieving key data of the source synchronization packet; determining whether the key data of the source synchronization packet includes an identifier of the network device if the network device is determined including at least two inputs and one output; generating a local synchronization packet and adding the identifier of the network device to the key data of the local synchronization packet when determining that the key data of the source synchronization packet does not include the identifier; and, sending the local synchronization packet through the output.