Ethernet Transfer Device Error Localization via FCS Inversion
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Solution Overview
Problem
Conventional Ethernet transfer devices face challenges in specifying the location of errors within frames without causing delays due to the insertion of a uniquely defined Data Check Sequence (DCS) field, which increases data length and leads to frame transfer delays.
Innovation Solution
A transfer device that calculates and compares frame check sequence codes, determines error states, and updates the Frame Check Sequence (FCS) code by inverting bits when necessary, allowing for error localization without frame delay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a DCS field is inserted into the frame data area to store inverse CRC calculation results for error detection, then error location specification capability is improved, but frame data length increases causing transfer delay
Solution Approach 1:
The invention extracts the error detection function from the data area by utilizing the existing FCS field at the frame end instead of inserting a DCS field within the data area. The FCS field is repurposed to store both the original CRC and its inverse, enabling error location specification without increasing frame data length.
Solution Approach 2:
The FCS field is given multiple functions: it serves as both the original frame check sequence and the storage location for the inverse CRC calculation results. This multi-functionality eliminates the need for additional fields while maintaining error detection and location capabilities.
2Speed
If frame transfer is performed in cut-through mode to minimize latency, then transfer speed is improved, but the ability to perform discarding process on frames with transmission errors is worsened
Solution Approach 1:
The invention performs preliminary error detection by calculating the inverse CRC and storing it in the FCS field during the reception phase. This allows subsequent devices to quickly verify frame integrity without retransmitting the entire frame, enabling rapid error frame discarding while maintaining cut-through mode performance.
Solution Approach 2:
The inverse CRC stored in the FCS field provides feedback information that enables receiving devices to immediately determine whether a frame contains transmission errors. This feedback mechanism allows for quick error detection and frame discarding without interrupting the high-speed cut-through transfer mode.
Data Source
AI summary
To include an FCS code calculation unit to calculate a first code that is an FCS code of a received frame, an FCS check unit to compare the first code with a second code that is an FCS code stored in the received frame, and to output a first comparison result indicating a match or no match between two codes, an inverse FCS check unit to compare the first code with a third code obtained by inverting each bit of the second code, and to output a second comparison result indicating a match or no match between two codes, an error determination unit to determine an error state of the received frame, and an FCS update unit to update, if the second comparison result indicates no match, the second code with a fourth code obtained by inverting each bit of the first code.