Multi-Core Communication Device With Ethertype-Specific Receive FIFOs
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Solution Overview
Problem
Existing communication devices with multi-core CPUs face challenges in quickly accessing and processing reception data due to inefficient data allocation methods, leading to prolonged processing times.
Innovation Solution
A communication device with a multi-core CPU that includes a received frame processing unit to determine the Ethertype of reception data and allocate it to specific buffering memories, which then transmit reception interrupt signals to corresponding CPUs for processing based on data size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If data is allocated to modules using conventional methods, then data allocation is achieved, but the time required for modules to access and process reception data is prolonged
Solution Approach 1:
The patent divides the buffering memory into multiple independent buffers, each dedicated to storing reception data of specific Ethertypes. This segmentation allows CPUs to directly access predetermined buffers without sequential searching, significantly reducing data access time and improving processing speed for multi-Ethertype communication data.
Solution Approach 2:
The patent pre-allocates specific buffers to specific Ethertypes before data reception occurs. When reception data arrives, the system immediately directs it to the predetermined buffer based on Ethertype identification, eliminating the need for real-time allocation decisions and reducing processing latency.
2Productivity
If conventional data allocation methods are used, then all Ethertypes can be handled, but processing efficiency for each CPU is reduced
Solution Approach 1:
The patent assigns different characteristics to different buffers based on their dedicated Ethertypes. Each buffer is optimized for its specific Ethertype, allowing CPUs to efficiently process specific data types in dedicated locations. This local optimization improves overall processing efficiency while maintaining manageable system complexity through clear organization.
Solution Approach 2:
The patent introduces a reception data allocation unit as an intermediary that receives reception data, identifies its Ethertype, and directs it to the appropriate predetermined buffer. This intermediary component simplifies the overall system by centralizing the allocation decision logic, reducing the complexity burden on individual CPUs and improving processing efficiency.
Data Source
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AI summary
To shorten a time required for each CPU of a multi-core CPU to end access of reception data after receiving data. A communication device includes: a multi-core CPU implemented with a plurality of CPUs each configured to implement an application; a received frame processing unit configured to determine an Ethertype of reception data and allocate the reception data according to the Ethertype; and a plurality of receive FIFOs each configured to receive the reception data allocated by the received frame processing unit and store the reception data according to the Ethertype, in which each of the plurality of receive FIFOs is configured to transmit a reception interrupt signal to a corresponding CPU of the multi-core CPU when receiving the reception data, and the CPU that receives the reception interrupt signal is configured to acquire a data size of the reception data from the receive FIFO that transmits the reception interrupt signal and perform processing of reading the reception data based on the data size.