Extracted Timing Model Common Path Pessimism Removal
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional static timing analysis tools introduce unnecessary pessimism due to common path pessimism during the extraction and modeling of design blocks, leading to inaccurate timing representations and increased pessimism in integrated circuit design.
Innovation Solution
A method to accurately model and extract timing information from the clock-network of design blocks, using characterization and decomposition techniques to create a robust and compact Extracted Timing Model (ETM) that removes common path pessimism, allowing for precise timing analysis and optimization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If conventional STA tools use both early and late arrival times on common timing arcs, then timing analysis is simplified, but the obtained slack is pessimistic and inaccurate
Solution Approach 1:
The patent segments the timing analysis process by identifying and separating common arcs from unique arcs. Common arcs are those shared between launch and capture paths, while unique arcs are path-specific. This segmentation allows the application of different arrival time treatments: early arrival times are applied only to unique arcs, while common arcs use a single arrival time, thereby eliminating common path pessimism while maintaining analysis feasibility.
Solution Approach 2:
The patent applies different quality characteristics to different parts of the timing graph. Specifically, it applies early arrival time optimization locally to unique arcs where it improves accuracy, while maintaining conservative single arrival time treatment on common arcs to avoid pessimism. This local differentiation of quality attributes resolves the contradiction between simplicity and accuracy.
2Reliability
If conventional STA tools apply conservative combinations of arrival times, then all timing paths are covered, but unnecessary pessimism is added to the timing model
Solution Approach 1:
The patent performs preliminary identification and classification of arcs into common and unique categories before conducting the actual timing analysis. This preliminary action enables the subsequent timing calculation to apply the correct arrival time treatment to each arc type, ensuring complete path coverage without introducing unnecessary pessimism. The preliminary classification preserves timing information accuracy while maintaining comprehensive coverage.
3Ease of manufacture
If ETM extraction ignores common path pessimism, then model extraction is simpler, but additional and unnecessary pessimism is added to the model
Solution Approach 1:
The patent segments the ETM extraction process by identifying common arcs within the design block and applying specialized handling to them. During extraction, common arcs are recognized and treated differently from unique arcs, with early arrival times applied only to unique arcs. This segmentation approach maintains extraction simplicity while eliminating the introduction of unnecessary pessimism in the generated ETM.
Data Source
AI summary
Systems and methods for generating Extracted Timing Models (ETM) for use in an analysis of the timing of an integrated circuit design in which common paths that contribute to Common Path Pessimism (CPP) are identified and included in the generated ETM such that a CPP removal algorithm implemented during the timing analysis will be properly adjusted to remove such pessimism. To generate an ETM, the clock latency paths will be characterized, taking into account the pins and timing arcs that are necessary for the identification and removal of common path pessimism, the timing information of the topologically crucial points of the design block will be retained in the ETM, and the non-essential and noisy information will be removed from the ETM to ensure that the ETM is robust and compact.