ETMD Die Package with TSV Interposer for Low-Z Multi-Die Stacking
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Solution Overview
Problem
Existing IC die integration techniques face challenges such as high cost, low insertion efficiency, and increased z-height due to complex interconnects and poor thermal conductivity in multi-die packages.
Innovation Solution
The development of a composite IC die package using an electro-thermo-mechanical die (ETMD) with through substrate vias that directly bonds IC dies, facilitating efficient electrical and thermal interconnection through a substrate with matched mechanical properties, allowing for hybrid bonding and improved thermal conductivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through mold vias (TMV) or through dielectric vias (TDV) are formed through package insulator material adjacent to lower-level die, then electrical interconnection to upper-level die is achieved, but package fabrication is complicated and thermal conductivity is poor
Solution Approach 1:
The patent extracts the interconnection function from the package insulator material and relocates it to a dedicated interposer substrate. This separation allows the insulator material to focus on electrical insulation while the interposer handles electrical interconnection, simplifying package fabrication and improving thermal conductivity.
Solution Approach 2:
The patent introduces an interposer substrate as an intermediary component between upper-level and lower-level die. This interposer acts as a mediator that provides both electrical interconnection pathways and thermal management, eliminating the need for complex through-insulator vias while maintaining reliable connectivity.
2Adaptability or versatility
If multiple IC die are integrated into a chip-scale unit, then heterogeneous silicon processes and small disaggregated chips can be combined, but upper-level die are difficult to electrically interconnect due to intervening lower-level die
Solution Approach 1:
The patent transitions from planar integration to three-dimensional stacking by introducing an interposer substrate that enables vertical interconnection. This dimensional change allows upper-level die to connect to lower-level die through the interposer, overcoming the blocking effect of intervening die and enabling heterogeneous multi-die integration.
3Reliability
If conventional interconnect methods are used, then electrical connection is achieved, but z-height increases and insertion efficiency decreases
Solution Approach 1:
The patent merges the interconnection and thermal management functions into a single interposer substrate structure. This integration eliminates the need for separate through-insulator vias and reduces the overall z-height by consolidating multiple functions into one component layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The ETMD enhances electrical and thermal interconnection between IC dies, reducing complexity and cost while maintaining a low z-height, thereby improving the performance and efficiency of multi-die packages.
Implementation Method 1
improved thermal and mechanical interconnection through a substrate with matched thermal expansion coefficients
Implementation Method 2
uses hybrid bonding techniques to form a metallurgically interdiffused and chemically bonded interface
Implementation Method 3
uses hybrid bonding techniques to form a metallurgically interdiffused and chemically bonded interface
Implementation Method 4
through a substrate with matched thermal expansion coefficients
Data Source
AI summary
Multi-die composite packages including directly bonded IC die and at least one electro-thermo-mechanical die (ETMD). An ETMD is distinguished from an active IC die as an ETMD is a passive die lacking any semiconductor devices, such as transistors. In exemplary embodiments, an ETMD includes a substrate, which may be a crystalline semiconductor material, for example, and one or more through substrate vias (TSVs) passing through a thickness of the substrate. The TSVs may enable a ETMD to electrically interconnect an (active) IC die of a composite package to another IC die of the package or to a package host.


