Minimum Euclidean Distance Finder for Low-Complexity MIMO Detection

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Solution Overview

Problem

In next-generation wireless communication systems, the burden of symbol detection increases with higher modulation orders and ranks, necessitating a method to reduce this burden while maintaining high-speed data transmission and reliability.

Innovation Solution

A symbol detection method and hardware structure that calculates and updates minimum Euclidean distances (ED) for log-likelihood ratio (LLR) calculations, using a modem chip with a common comparator and index-based ED finder to compare magnitudes of EDs among symbol vector candidates, thereby reducing the number of comparators and hardware size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the modulation order and rank are increased to achieve high-speed data transmission, then the data transmission speed is improved, but the burden of symbol detection increases

Engineering Contradiction:
Improvedata transmission speedVSAvoidsymbol detection burden
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent segments the symbol detection process into multiple stages: calculating Euclidean distances for all symbol vector candidates, selecting a subset of candidates based on distance thresholds, and performing refined detection only on selected candidates. This segmentation reduces the computational burden from processing all candidates to processing only a manageable subset, enabling high-order modulation and MIMO to be handled efficiently.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies partial action by calculating Euclidean distances for all symbol vector candidates initially, but then using threshold-based filtering to process only a portion of these candidates in subsequent detection stages. This approach balances between exhaustive search (which ensures accuracy) and reduced computation (which enables practical implementation), resolving the contradiction between detection accuracy and computational burden.

Inventive Principle:
Principle #16Partial or excessive action

2Device complexity

If the number of comparators is reduced to decrease hardware size, then the hardware complexity is reduced, but the ability to handle high modulation orders and ranks may be compromised

Engineering Contradiction:
Improvehardware sizeVSAvoidhandling capability for modulation orders and ranks
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent introduces dynamic threshold adjustment mechanisms that adapt to different modulation orders and MIMO ranks. The threshold for selecting symbol vector candidates is not fixed but varies based on the specific communication scenario, allowing the system to maintain high adaptability with a reduced number of comparators. This dynamic approach enables the hardware to handle various modulation schemes without requiring a proportional increase in comparator count.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes key parameters of the detection algorithm, specifically the threshold for selecting symbol vector candidates and the number of candidates processed in each stage. By adjusting these parameters based on modulation order and rank, the system can maintain detection performance across different scenarios while using a fixed, reduced number of comparators. This parameter-based adaptation resolves the contradiction between hardware size and handling capability.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP4440055A1Minimum euclidean distance finder and operating method thereof
Publication Date: 2024.10.02 SAMSUNG ELECTRONICS CO LTD
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AI summary

An operating method of a modem chip includes receiving a first Euclidean distance (ED) set including an ED of first symbol vector candidates, comparing magnitudes of the EDs of the first ED set, calculating each of a first minimum ED corresponding to a bit value of a first bit being 1 and a second minimum ED corresponding to the bit value of the first bit being 0, the first bit being from among a plurality of bits of a plurality of layers of the transmission symbol, based on first index information including results of the comparing the magnitudes of the EDs of the first ED set, updating the first minimum ED and the second minimum ED with a smallest first minimum ED and a smallest second minimum ED, respectively, and detecting the transmission symbol based on the updated first minimum ED and the updated second minimum ED.