eUSB2 Drive-Low Timing for Long Differential Signal Lines
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Solution Overview
Problem
The challenge of implementing Universal Serial Bus (USB) communication between systems with varying voltage levels, such as between eUSB2 and legacy USB, is exacerbated by propagation delays in differential signal lines causing the transition to high-impedance states before the completion of the transmission of the signal lines are fully driven low, leading to inefficiency in communication between devices.
Innovation Solution
A circuit is introduced that extends the duration of driving differential signal lines low beyond the standard 4 UI to compensate for propagation delays, ensuring full signal line discharge despite varying lengths, using a combination of resistors and switches to manage pull-down strengths dynamically.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the transition to high-impedance state is performed according to the standard 4 UI duration, then USB communication protocol compliance is maintained, but signal lines are not fully discharged when propagation delay is 1 UI or greater
Solution Approach 1:
The patent implements dynamic adjustment of the drive-low duration based on the measured propagation delay of the signal lines. Instead of using a fixed 4 UI duration, the system calculates the actual propagation delay and extends the drive-low duration accordingly to ensure complete signal discharge before transitioning to high-impedance state, thereby resolving the contradiction between reliable signal discharge and communication efficiency.
2Reliability
If the drive-low duration is extended to compensate for propagation delays, then full signal line discharge is achieved, but the USB protocol standard of 4 UI is violated
Solution Approach 1:
The patent changes the temporal parameter of the drive-low duration from a fixed value (4 UI) to a variable value that adapts to the actual propagation delay characteristics of the signal lines. This parameter change allows the system to maintain USB protocol compliance while ensuring complete signal discharge by extending the drive-low duration only when propagation delay exceeds the standard threshold.
3Length of stationary object
If differential signal lines are made longer to meet physical requirements, then signal propagation delay increases, but signal lines can be fully discharged
Solution Approach 1:
The patent implements a feedback mechanism that measures the actual propagation delay of the differential signal lines and uses this information to adjust the drive-low duration. This feedback approach allows the system to accommodate varying signal line lengths and their associated propagation delays, ensuring complete signal discharge regardless of the physical characteristics of the connection.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution ensures full signal line discharge, maintaining compliance with USB standards and enabling seamless communication across devices with different voltage levels by accounting for propagation delays.
Implementation Method 1
driving the differential signal lines low by causing a drive low circuit to drive the differential signal lines low for about (4+X) UI
Implementation Method 2
placing the differential signal lines in a high-impedance (such as high-z) state
Data Source
Figure 1~2B
Figure 3
Figure 4~5
AI summary
In at least some examples, a system includes: an embedded Universal Serial Bus 2 (eUSB2) device (115) having a first receiver (135) and a first transmitter (130); a processor (105); a second transmitter (125) coupled to the processor (105); a second receiver (140) coupled to the processor (105); a drive low circuit (150) coupled to the processor (105) and the second transmitter (125); and differential signal lines having a length greater than ten inches. The differential signal lines are coupled at a first end to the first receiver (135) and the first transmitter (130) and at a second end to the second transmitter (125) and the second receiver (140). The processor (105) is configured to control the drive low circuit (150) to drive the differential signal lines low with a logic 'O' to cause the first receiver (135) to receive the logic 'O' and a value of a signal present on the differential signal lines to reach about 0 volts.