Multi-Unit EUV Mask Defect Mitigation
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Solution Overview
Problem
Extreme ultraviolet (EUV) lithography masks often contain defects such as phase defects, which can lead to reduced image intensity and pattern distortion on semiconductor wafers, requiring costly and time-consuming compensation methods to mitigate these issues.
Innovation Solution
A method and apparatus for EUV lithography that involves a multi-unit EUV mask configuration with patterned units, where each unit corresponds to a portion of an IC design, and multiple exposures with fractional radiation doses are used to mitigate the effects of phase defects by superimposing images from defect-free and defective regions, thereby enhancing pattern fidelity without increasing mask fabrication costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If EUV lithography is used to support critical dimension requirements of smaller devices, then manufacturing precision is improved, but mask defects such as phase defects cause reduced image intensity and pattern distortion
Solution Approach 1:
The mask is divided into multiple units, each containing a pattern. By segmenting the mask into multiple units with different defect characteristics, the system can leverage both defective and defect-free regions to compensate for phase defects, thereby maintaining pattern fidelity while using EUV lithography for high precision manufacturing
Solution Approach 2:
The radiation dose is changed from a single full dose to multiple fractional doses. By applying multiple fractional radiation doses from different mask units, the system alters the exposure parameters to mitigate the impact of phase defects on the final pattern, thus improving reliability while maintaining manufacturing precision
2Reliability
If compensation methods such as tighter process controls or mask defect repair are used, then pattern fidelity is improved, but mask fabrication time and cost increase significantly
Solution Approach 1:
Multiple images are exposed in advance using different mask units with fractional radiation doses before the final development step. This preliminary action allows defect compensation to be built into the exposure process itself, eliminating the need for time-consuming post-exposure compensation methods while maintaining pattern fidelity
Solution Approach 2:
Images from multiple mask units (both defective and defect-free regions) are merged through superposition during the exposure process. By combining these images with fractional doses, the system achieves pattern fidelity improvement without requiring separate compensation steps, thus reducing mask fabrication time and cost
3Reliability
If multiple exposures with fractional radiation doses are used to mitigate phase defects, then pattern fidelity is improved, but the number of exposure steps increases
Solution Approach 1:
The mask is designed with multiple units that serve different functions: some units contain the actual pattern while others serve as reference or compensation patterns. This multi-functionality allows a single mask structure to handle both pattern formation and defect compensation, reducing the need for separate exposure processes despite using multiple fractional doses
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces the impact of phase defects on pattern fidelity in EUV lithography, allowing for the production of high-quality semiconductor devices without the need for expensive compensation methods, thereby improving manufacturing efficiency and reducing costs.
Implementation Method 1
EUV scanners use reflective rather than refractive optics, e.g., mirrors instead of lenses
Implementation Method 2
The wafer includes a first substrate and a first photoresist (or resist) layer formed over the first substrate
Data Source
AI summary
Provided is an integrated circuit (IC) fabrication method. The method includes receiving a mask, the mask having a plurality of dies and receiving a wafer, the wafer having a resist layer. The method further includes exposing the resist layer using the mask with a fraction radiation dose thereby forming a first plurality of images; re-positioning the mask relative to the wafer; and exposing the resist layer using the mask with another fraction radiation dose. A second plurality of images is formed, wherein a portion of the second plurality of images is superimposed over another portion of the first plurality of images.


