EUV Mask Layout Adjustment for Defect Avoidance
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Solution Overview
Problem
Reflective masks used in extreme ultraviolet lithography are vulnerable to manufacturing defects such as oxidation and damage, which can impact the layout patterns produced on wafers, leading to defects in the fabricated integrated circuits.
Innovation Solution
An analyzer module is used to detect defects on the mask-blank, and the layout pattern is adjusted by shifting or rotating it to avoid critical features landing on defects, or by incorporating additional patterns to transfer the defect impact away from critical features, thereby minimizing the impact of defects on the wafer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If reflective masks are used in EUV lithography to achieve smaller feature sizes, then manufacturing precision is improved, but the masks become vulnerable to defects such as oxidation and damage
Solution Approach 1:
The patent performs preliminary defect detection on the mask-blank before pattern formation, identifies defect locations in advance, and pre-adjusts the layout pattern to avoid these defects. This preliminary action prevents defect impact before the masking process begins.
Solution Approach 2:
The patent converts the harmful effect of mask defects into a beneficial process by using the detected defect information to intelligently adjust the layout pattern, transforming the defect from a source of wafer errors into an opportunity for proactive pattern optimization.
2Productivity
If layout patterns are produced on mask-blanks with existing defects, then productivity is maintained, but defect impact propagates to the wafer
Solution Approach 1:
The patent implements a feedback mechanism where defect detection results from inspecting the mask-blank are fed back into the layout pattern generation process, enabling real-time pattern adjustment based on actual defect locations to prevent defect propagation.
Solution Approach 2:
The system performs preliminary defect detection and layout adjustment before the masking process, allowing patterns to be optimized in advance to avoid defects while maintaining production efficiency.
3Manufacturing precision
If the layout pattern is adjusted to avoid defects, then wafer quality is improved, but additional processing steps are required
Solution Approach 1:
The layout adjustment process is automated and self-executing, where the system automatically detects defects, calculates optimal pattern shifts, and generates adjusted layout data without requiring manual intervention or complex additional processing steps.
Solution Approach 2:
The patent adjusts layout pattern parameters (position, orientation, shape) based on defect locations, using computational algorithms to optimize pattern placement while maintaining design specifications and avoiding the need for physical mask rework.
Data Source
AI summary
A method of adjusting a layout pattern includes shifting or rotating an entire layout pattern based on information of a plurality of defects of a mask-blank to avoid an impact of first defects of the plurality of defects when the layout pattern is produced as a mask on the mask-blank. The method includes adjusting the layout pattern of the mask at a first location based on information of a second defect of a remaining of the plurality of defects to reduce an impact of the second defect when the layout pattern in projected on a wafer. The method also includes adjusting the layout pattern of the mask at a second location based on information of a third defect of the remaining of the plurality of defects and distinct from the second defect to shift an impact position of the third defect when the layout pattern in projected on the wafer.