EUV Lithography OPC Polygon Generation for Tip-to-Tip Printability
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Solution Overview
Problem
EUV lithography faces challenges in tip-to-tip printability due to pullback effects and proximity issues, limiting feature size and requiring multiple masks, making it financially uncompetitive with traditional lithography techniques.
Innovation Solution
The implementation of novel optical proximity correction (OPC) techniques that generate a third polygon with dimensions corresponding to the combination of first and second design polygons and a filled polygon within it, allowing for closer tip proximity without the need for multiple masks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If EUV lithography is used to transfer very small patterns, then nanometer-scale patterning capability is improved, but tip-to-tip printability deteriorates due to pullback effects and light scatter
Solution Approach 1:
The patent applies optical proximity correction (OPC) techniques in advance during mask design to pre-compensate for pullback effects. By modifying the mask pattern dimensions before lithography, the actual printed features achieve the desired tip-to-tip spacing without suffering from photoresist shrinkage during exposure
Solution Approach 2:
The patent adjusts critical parameters such as exposure dose, focus conditions, and mask pattern dimensions to optimize the lithography process. By changing these parameters, the system compensates for light scatter and pullback effects while maintaining nanometer-scale patterning capability
2Quantity of substance
If multiple masks are used to achieve closer tip proximity, then feature density is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent merges multiple patterning operations into a single lithography step by using OPC-corrected masks. This consolidation achieves high feature density while eliminating the need for sequential mask applications, thereby reducing process complexity and manufacturing costs
3Speed
If photoresist material is heated by incident UV waves, then exposure reaction is accelerated, but photoresist shrinkage increases due to pullback effect
Solution Approach 1:
The patent applies preliminary anti-action by designing mask patterns that anticipate and counteract the pullback effect. The OPC process pre-distorts the mask features in the opposite direction of expected shrinkage, so that after photoresist heating and shrinkage occur, the final printed dimensions match the target specifications
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances tip-to-tip printability, enabling more compact integrated circuit designs and reducing the footprint on semiconductor substrates, while maintaining financial viability for EUV lithography by eliminating the need for multiple masks.
Implementation Method 1
A pattern formed on the EUV lithographic mask can be transferred to the photoresist layer by reflecting EUV light off of portions of a reflective surface upon which the EUV lithographic mask is disposed
Implementation Method 2
This reaction, and the associated photoresist shrinkage, is accelerated as the photoresist material is heated by the energy of the incident UV waves
Data Source
AI summary
A method of optical proximity correction (OPC) in extreme ultraviolet lithography (EUV) lithography includes providing a patterned layout design including first and second design polygons that correspond with the pre-pattern opening, wherein the first and second design polygons are separated by a separation distance, and correcting the patterned layout design using OPC by generating (1) a third polygon that has dimensions corresponding to a combination of the first and second design polygons and the separation distance and (2) and filled polygon within the third polygon, thereby generating an OPC-corrected patterned layout design. EUV photomasks may be manufactured from the OPC-corrected patterned layout design, and integrated circuits may be fabricated using such EUV photomasks.