EUV Photoresist Patterning with a Thin Electron-Boosting Base Layer

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Solution Overview

Problem

EUV lithography in semiconductor manufacturing faces challenges with high exposure doses, leading to reduced throughput and increased costs due to the higher photon energy and penetration of EUV radiation, which necessitates innovative methods to enhance photoresist exposure efficiency.

Innovation Solution

A method involving a two-layer lithography stack with a base layer that boosts photoresist exposure using energetic electrons generated from underlying layers, reducing the EUV radiation dose required for patterning by enhancing electron flux from below the photoresist layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If EUV radiation is used for lithography patterning, then higher resolution patterns can be achieved, but the exposure dose required increases significantly

Engineering Contradiction:
Improvepatterning resolutionVSAvoidexposure dose
Core Design Contradiction:
Manufacturing precisionVSUse of energy by moving object

Solution Approach 1:

The patent introduces an electron booster layer as an intermediary between the EUV radiation source and the photoresist layer. This layer absorbs EUV photons and converts them into energetic electrons, which then expose the photoresist. This intermediary mechanism enhances the effectiveness of EUV radiation by converting photon energy into electron flux, thereby reducing the required exposure dose while maintaining high-resolution patterning capability

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent modifies the physical and chemical parameters of the base layer by introducing specific materials (such as silicon carbide, silicon oxycarbonitride, or silicon carbonitride) with controlled thicknesses (0.5 nm to 5 nm). These parameter changes optimize the generation and transmission of energetic electrons from the electron booster layer into the photoresist, improving exposure efficiency and reducing the required EUV exposure dose

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If higher exposure doses are used in EUV lithography, then pattern quality can be maintained, but manufacturing throughput decreases

Engineering Contradiction:
Improvepattern qualityVSAvoidmanufacturing throughput
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The electron booster layer acts as a mediator that converts EUV photons into energetic electrons, creating a more efficient exposure mechanism. This intermediary process allows for lower exposure doses to achieve the same pattern quality, thereby increasing manufacturing throughput by reducing the time and energy required for each exposure cycle

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The electron booster layer performs preliminary energy conversion before the photoresist exposure step. By pre-converting EUV photons into energetic electrons in the booster layer, the system prepares a high-density electron flux that efficiently exposes the photoresist in a single pass, eliminating the need for multiple exposure cycles and improving throughput

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method reduces EUV radiation dose by 10% to 50%, thereby increasing throughput and lowering manufacturing costs by improving photoresist exposure efficiency and pattern transfer accuracy.

Implementation Method 1

exposing a second portion of the photoresist layer with a pattern of electron flux from the second side, the electron flux being directed into the photoresist layer from the base layer in response to the EUV radiation

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Data Source

PatentUS12494369B2Extreme ultraviolet lithography patterning method
Publication Date: 2025.12.09 TOKYO ELECTRON LTD
  • US12494369B2 patent drawing
  • US12494369B2 patent drawing
  • US12494369B2 patent drawing

AI summary

A method for fabricating a semiconductor device is described that includes forming a base layer over a top layer of a substrate, the base layer includes a silicon based dielectric having a thickness less than or equal to 5 nm and greater than or equal to 0.5 nm; forming a photoresist layer over the base layer, the photoresist including a first side and an opposite second side; exposing a first portion of the photoresist layer to a pattern of extreme ultraviolet (EUV) radiation from the first side; exposing a second portion of the photoresist layer with a pattern of electron flux from the second side, the electron flux being directed into the photoresist layer from the base layer in response to the EUV radiation; developing the exposed photoresist layer to form a patterned photoresist layer; and transferring the pattern of the patterned photoresist layer to the base layer and the top layer.