EUV Blank Planarization Layer via CVD
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Solution Overview
Problem
Extreme ultraviolet lithography systems face significant challenges due to phase defects caused by scratches and surface variations on the substrate, which result in light wave interference effects that distort patterns on semiconductor wafers, as current methods for smoothing substrates either introduce new imperfections or fail to achieve the necessary flatness for EUV applications.
Innovation Solution
An integrated EUV blank production system that includes a vacuum chamber for depositing a planarization layer to fill and smooth substrate imperfections, followed by a multi-layer stack deposition, using techniques like CVD, PVD, and polishing to achieve an atomically flat surface, minimizing defects and ensuring the substrate's smoothness for EUV applications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If chemical mechanical polishing, magneto-rheological finishing, or ion beam polishing is used to smooth the mask blank surface, then surface flatness is improved, but scratch-dig marks are introduced which cause phase defects in EUV lithography
Solution Approach 1:
The patent replaces mechanical polishing processes with a chemical vapor deposition process that deposits a planarization layer. This substitution eliminates mechanical contact that causes scratch-dig marks while achieving the required surface flatness through controlled material deposition and thermal planarization.
Solution Approach 2:
The planarization layer is deposited before the multilayer stack to pre-compensate for surface imperfections. By performing the planarization action beforehand, the subsequent multilayer deposition occurs on a perfectly flat surface, preventing phase defects from propagating through the final product.
2Manufacturing precision
If deeper polishing is performed to remove surface imperfections, then surface smoothness is improved, but new pits and scratches are introduced
Solution Approach 1:
The patent replaces aggressive mechanical polishing with a gentle chemical vapor deposition process. The CVD process deposits material conformally and planarizes the surface through thermal diffusion without mechanical contact, eliminating the creation of new pits and scratches while achieving atomically flat surfaces.
Solution Approach 2:
The patent changes the fundamental parameter of surface treatment from mechanical removal to chemical deposition. By controlling deposition temperature, pressure, and material flow during CVD, the process achieves planarization through controlled material addition and thermal relaxation rather than mechanical subtraction.
3Manufacturing precision
If conventional polishing processes are used for deep ultraviolet lithography, then surface flatness is sufficient for DUV applications, but the same processes cause intolerable phase defects for extreme ultraviolet lithography
Solution Approach 1:
The patent changes the surface treatment approach from mechanical polishing to chemical vapor deposition with thermal planarization. This parameter change achieves the ultra-low surface roughness (less than 0.003 micrometers RMS) required for EUV lithography while maintaining surface flatness, eliminating phase defects that would occur with conventional polishing methods.
Solution Approach 2:
The patent substitutes mechanical polishing systems with a chemical vapor deposition system followed by thermal processing. This substitution eliminates the mechanical contact that causes phase-defecting scratch-dig marks while achieving the atomically flat surfaces necessary for reliable EUV lithography performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively eliminates pits, scratches, and particles on the substrate surface, achieving a smooth and flat surface with RMS smoothness below 0.5 nm, reducing phase defects and enhancing the quality of EUV mask blanks, thereby improving the performance and reliability of EUV lithography systems.
Implementation Method 1
using techniques like CVD, PVD, and polishing to achieve an atomically flat surface
Implementation Method 2
using techniques like CVD, PVD, and polishing to achieve an atomically flat surface
Data Source
AI summary
An integrated extreme ultraviolet (EUV) blank production system includes: a vacuum chamber for placing a substrate in a vacuum; a first deposition system for depositing a planarization layer having a planarized top surface over the substrate; and a second deposition system for depositing a multi-layer stack on the planarization layer without removing the substrate from the vacuum. The EUV blank is in an EUV lithography system includes: an extreme ultraviolet light source; a mirror for directing light from the EUV source; a reticle stage for placing a EUV mask blank with a planarization layer; and a wafer stage for placing a wafer. The EUV blank includes: a substrate; a planarization layer to compensate for imperfections related to the surface of the substrate, the planarization layer having a flat top surface; and a multi-layer stack on the planarization layer.