EUV Resist Pattern Reinforcement for Sub-10 Nm Etch Transfer
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Solution Overview
Problem
Extreme ultraviolet (EUV) lithography faces challenges in achieving high resolution and etch selectivity due to stochastic effects such as shot noise and secondary electron exposure, leading to random failures and image contrast degradation in printing sub-10 nm features, and low etch selectivity of patterned EUV resist masks.
Innovation Solution
The method involves using EUV lithography to pattern a semiconductor device, followed by plasma processing to deposit a silicon-based layer and a smoothing film over the patterned resist, and then selectively increasing the etch mask thickness using a height-enhancing film to improve etch selectivity and reduce line edge roughness and linewidth roughness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If EUV lithography is used to pattern sub-10 nm features, then resolution is improved, but stochastic effects cause random failures and image contrast degradation
Solution Approach 1:
The patent changes the physical and chemical parameters of the etch mask system by depositing multiple layers (silicon oxide, silicon nitride, silicon carbide) with specific thicknesses and compositions. This modifies the etch selectivity parameters to compensate for EUV stochastic effects, enabling reliable pattern transfer at sub-10 nm nodes despite resist variability
Solution Approach 2:
The patent employs composite etch mask structures combining multiple materials (silicon oxide, silicon nitride, silicon carbide) with different etch selectivities. This composite approach creates a robust mask system that maintains pattern fidelity through the etch process, overcoming the reliability issues caused by EUV stochastic effects
2Measurement precision
If EUV lithography is used to pattern sub-10 nm features, then resolution is improved, but line edge roughness and linewidth roughness increase
Solution Approach 1:
The patent optimizes the thickness parameters of the etch mask layers (e.g., silicon oxide layer thickness of 5-20 nm, silicon nitride layer thickness of 10-30 nm) to control the etch profile. By carefully adjusting these parameters, the patent achieves smoother line edges and reduced linewidth roughness while maintaining sub-10 nm resolution
3Ease of manufacture
If patterned EUV resist masks are used for etching, then pattern transfer is enabled, but etch selectivity is insufficient
Solution Approach 1:
The patent segments the etch mask function into multiple distinct layers, each with optimized etch selectivity characteristics. The silicon oxide layer provides one level of selectivity, the silicon nitride layer provides another, and the silicon carbide layer provides a third. This segmentation allows independent optimization of each layer's etch resistance to achieve overall high etch selectivity
Solution Approach 2:
The patent changes the chemical composition parameters of the etch mask layers to achieve differential etch selectivity. By selecting materials with specific chemical properties (silicon oxide, silicon nitride, silicon carbide) and controlling their thicknesses, the patent creates a mask system with tailored etch selectivity that enables precise pattern transfer
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances etch selectivity and reduces line edge roughness and linewidth roughness by up to 70%, enabling more precise pattern transfer and overcoming the limitations of EUV resist thickness and stochastic effects.
Implementation Method 1
generating a first plasma from a gas mixture including SiCl4 and one or more of argon, helium, nitrogen, and hydrogen
Implementation Method 2
exposing the substrate to the first plasma to deposit a second layer including a material comprising silicon over the patterned layer
Implementation Method 3
patterning the first layer using an extreme ultraviolet (EUV) lithography process
Data Source
AI summary
A method of forming a semiconductor device includes depositing a first layer over a substrate and patterning the first layer using an extreme ultraviolet (EUV) lithography process to form a patterned layer and expose portions of the substrate. The method includes, in a plasma processing chamber, generating a first plasma from a gas mixture including SiCl4 and one or more of argon, helium, nitrogen, and hydrogen. The method includes exposing the substrate to the first plasma to deposit a second layer including silicon over the patterned layer.