Multi-Stage Gate Control for EV Inverter Power Switches
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Solution Overview
Problem
Inverters used in electric vehicles experience inefficiencies due to switching losses in power device switches, which are exacerbated by rapid transitions and excessive oscillations in gate voltage levels, potentially damaging the power switches and increasing conduction losses.
Innovation Solution
A controlled gate driver system that manages gate voltage transitions of power switches in inverters by employing a multi-stage voltage increase and decrease strategy, including a fast initial transition, a reduced intermediate voltage during ringing phases, and a gradual increase to a higher voltage to minimize oscillations and conduction losses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a rapid gate voltage transition is applied to the power switch, then the switching speed is improved, but excessive oscillations and dynamic stress are generated that can damage the power switch and increase conduction losses
Solution Approach 1:
The gate voltage transition is divided into multiple stages: an initial fast transition phase followed by a slower second phase. This segmentation allows the switch to quickly respond to control signals while subsequently settling with reduced oscillations, thereby maintaining high switching speed without compromising reliability.
Solution Approach 2:
The gate driver dynamically adjusts its output impedance or driving capability during the switching transition. By modifying the driving characteristics in real-time, the system achieves fast initial switching while controlling subsequent oscillations, resolving the contradiction between speed and reliability.
2Speed
If a high gate voltage level is maintained throughout the switching transition, then the power switch turns on quickly, but excessive oscillations occur that can exceed the maximum rated gate voltage level and damage the power switch
Solution Approach 1:
The gate driver applies a high voltage initial boost to rapidly charge the gate and achieve fast turn-on, then subsequently reduces the voltage level after the initial transition. This preliminary high-voltage action enables fast switching while the follow-up voltage reduction prevents dangerous overshoot and oscillations.
Solution Approach 2:
The gate driver is designed to anticipate and counteract potential voltage overshoot by implementing a controlled second phase of voltage reduction. This cushioning action prevents the gate voltage from exceeding maximum rated levels, protecting the power switch from damage while maintaining efficient operation.
3Device complexity
If a single-stage gate voltage transition is used, then the control circuit is simple, but switching losses and conduction losses are increased due to oscillations and extended transition times
Solution Approach 1:
The gate driving waveform is segmented into distinct phases with different voltage levels and transition rates. This multi-stage approach reduces switching losses by minimizing oscillations and extending transition times optimally, while the control complexity remains manageable through systematic waveform design.
4Reliability
If the gate voltage transitions slowly to avoid oscillations, then the power switch experiences reduced dynamic stress, but switching losses increase due to extended transition times
Solution Approach 1:
The gate driver employs dynamic control with different transition rates for different phases of the switching event. The initial phase uses faster transitions to minimize switching losses, while the subsequent phase uses slower transitions to reduce oscillations and dynamic stress, thereby optimizing both efficiency and reliability.
Data Source
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AI summary
A method includes performing, by one or more controllers, operations including: receiving a pulse to control an operation of a power switch including a gate terminal; generating, based on the received pulse, a first signal to the gate terminal to increase a gate voltage level of the power switch at a first rate from an off-state gate voltage level to a first on-state gate voltage level in a first time period; and generating, based on the received pulse, a second signal to the gate terminal to increase the gate voltage level of the power switch at a second rate, less than the first rate, to a second on-state gate voltage level in a second time period subsequent to the first time period.