Event Detection Filter Submodule for Harsh Environment Reliability

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Solution Overview

Problem

Electrical systems exposed to harsh environmental conditions, such as nuclear radiation, are susceptible to false event detections due to environmental factors, leading to system upsets and potential interruptions.

Innovation Solution

An event detection system response controller is introduced, featuring an ED digital filter submodule with a signal synchronizer, signal filter, interface validator, interface validation filter, and pulse shaper. This submodule processes event signals from event detectors, synchronizes them, applies filtering criteria, validates the signals, and shapes the output to suppress false detections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If event detectors are used to monitor electrical systems, then system reliability is improved, but false detections occur due to harsh environmental conditions

Engineering Contradiction:
Improvesystem reliabilityVSAvoidfalse detections
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The event detection system is divided into multiple independent digital filter submodules, each processing signals from specific event detectors. Each submodule contains sequential filtering stages (signal synchronizer, signal filter, interface validator, interface validation filter, pulse shaper) that work independently to process and validate events, reducing the impact of false detections from individual detectors on the overall system

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple intermediary filtering components are introduced between the event detectors and the main system. The signal synchronizer synchronizes incoming signals to a digital clock domain, the signal filter applies filtering criteria, the interface validator validates correlated relationships, the interface validation filter applies additional filtering, and the pulse shaper shapes pulse durations. These intermediaries act as mediators that filter out false detections caused by harsh environmental conditions

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If multiple filtering stages are applied to event signals, then false detection suppression is improved, but device complexity increases

Engineering Contradiction:
Improvefalse detection suppressionVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The complex filtering functionality is segmented into multiple specialized submodules, with each submodule containing a specific sequence of filtering components. This modular segmentation allows each component to be optimized for its specific function while maintaining overall system manageability and reducing the complexity burden through organized modularity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The digital filter submodules are designed with universal functionality to handle various types of event detector signals through the same sequence of filtering operations. Each submodule can process signals from different event detectors using the same filtering methodology, reducing overall system complexity through standardized multi-functional processing units

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250102563A1Event detection system response controller
Publication Date: 2025.03.27 RAYTHEON CO
  • US20250102563A1 patent drawing
  • US20250102563A1 patent drawing
  • US20250102563A1 patent drawing

AI summary

An event detection system response controller for an electrical system includes at least one event detector (ED) digital filter submodule having a signal input and a signal output. The at least one ED digital filter submodule is configured to receive at least one event signal output from one or more event detectors at the signal input. Each of the at least one ED digital filter submodule includes a signal synchronizer, a signal filter, an interface validator, an interface validation filter, and a pulse shaper sequentially arranged from the signal input to the signal output.