Event-driven Computation Dispatch Units for Parallel Processing

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In high-performance parallel computation, processor utilization is inefficient due to communication latency and synchronization overheads, leading to idle computational resources when data is not readily available for processing tasks.

Innovation Solution

Implementing a fine-grained event-driven approach with dispatch units that maintain counters for computational tasks, allowing tasks to execute as soon as their input data is available, and dynamically prioritizing tasks for execution based on readiness and priority.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional parallel computation with tight loops is used, then processor utilization is efficient when data is readily available, but communication latency and synchronization overhead become significant when there are few tasks per processor or when data must wait for arrival from other processors

Engineering Contradiction:
Improveprocessor utilizationVSAvoidcommunication latency and synchronization overhead
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent segments the computation into fine-grained tasks that can be independently scheduled and executed. Each task is a discrete unit of work that can be dispatched to available processors, allowing the system to dynamically allocate processing capacity to individual tasks rather than requiring processors to wait for data in traditional loop-based parallel computation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The dispatch unit performs preliminary actions by maintaining counters that track data availability for each task. When data arrives from other processors, the counter is incremented and the dispatch unit proactively identifies which tasks have become ready for execution, so that processors can be immediately assigned to those tasks without waiting for synchronization barriers or loop iterations.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If fine-grained event-driven task scheduling is implemented, then tasks can execute as soon as input data is available improving processor utilization, but the expense of checking for presence of multiple smaller chunks of data and choosing execution order increases system complexity

Engineering Contradiction:
Improveprocessor utilizationVSAvoidtask scheduling complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The dispatch unit serves as an intermediary between data producers and task executors. It maintains counters for each task that track the arrival of input data, and when a counter reaches the required threshold, the dispatch unit automatically identifies the task as ready for execution. This intermediary manages the complexity of tracking multiple data chunks and determining execution order, shielding processors from this complexity while enabling fine-grained event-driven scheduling.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If processors wait for data availability in traditional parallel computation, then synchronization is maintained, but computational resources remain idle leading to inefficient resource utilization

Engineering Contradiction:
ImprovesynchronizationVSAvoidresource utilization
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system dynamically adapts the synchronization mechanism to the actual data availability. Rather than forcing all processors to wait at fixed synchronization points, the dispatch unit dynamically identifies which tasks are ready based on counter values, and assigns them to available processors. This dynamic approach maintains synchronization reliability while eliminating idle waiting time, as processors are continuously assigned to tasks whose data has arrived.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9384047B2Event-driven computation
Publication Date: 2016.07.05 D E SHAW RES & DEV LLC
  • US9384047B2 patent drawing
  • US9384047B2 patent drawing
  • US9384047B2 patent drawing

AI summary

An apparatus for high-performance parallel computation, includes plural computation nodes, each having dispatch units, memories in communication with the dispatch units, and processors, each of which is in communication with the memories and the dispatch units. Each dispatch unit is configured to recognize, as ready for execution, one or more computational tasks that have become ready for execution as a result of counted remote writes into the memories. Each of the dispatch units is configured to receive a dispatch request from a processor and to determine whether there exist one or more computational tasks that are both ready and available for execution by the processor.