Event-Driven Neural Network Circuit With Adaptive Synapses
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Solution Overview
Problem
Current neuromorphic and synaptronic computation systems lack an efficient event-driven universal neural network circuit capable of real-time spatiotemporal processing and adaptive learning, limiting their ability to perform tasks like perception, action, and cognition in a noise-robust, self-tuning, and self-configuring manner.
Innovation Solution
An event-driven universal neural network circuit comprising multiple digital neurons interconnected via adaptive synapses with learning rules, where each neuron updates its operational state and determines firing events based on input signals weighted by synaptic weights, and an interface module updates learning rules to manage false negatives and positives, implemented using reconfigurable CMOS circuits for logic and memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional digital models are used for computation, then manipulation of 0s and 1s is achieved, but the system cannot function analogously to biological brains for neuromorphic computation
Solution Approach 1:
The patent replaces traditional digital binary computation (mechanical/electronic switching of 0s and 1s) with neuromorphic computation that mimics biological neural networks. Digital neurons and synapses are implemented using electronic circuits that emulate biological spike propagation and synaptic plasticity, enabling brain-like processing while maintaining digital implementation.
Solution Approach 2:
The system changes the fundamental computational parameters from binary states (0/1) to continuous analog-like states representing neural membrane potentials and synaptic conductances. This allows the system to process information in a manner analogous to biological brains while still using digital electronics to represent and manipulate these continuous parameters.
2Adaptability or versatility
If spike-timing dependent plasticity is implemented to increase synaptic conductance, then learning capability is improved, but the system requires precise timing control which increases complexity
Solution Approach 1:
The synaptic plasticity mechanism operates autonomously based on the relative timing of pre-synaptic and post-synaptic spikes. The system automatically adjusts synaptic conductance according to STDP rules without requiring external control, enabling self-organizing learning patterns and adaptive network formation through intrinsic temporal correlations.
Solution Approach 2:
The STDP mechanism implements a feedback loop where the timing relationship between spikes determines future synaptic strength, which in turn affects future spike propagation. This creates a self-regulating learning system that adapts synaptic weights based on observed temporal patterns, enabling the network to learn from experience without external intervention.
3Speed
If event-driven operation is implemented for real-time processing, then processing speed is improved, but the system requires precise time step management which increases complexity
Solution Approach 1:
The system uses periodic clock signals to define discrete time steps for event-driven operation. Neurons are updated at regular intervals, with spikes generated and propagated synchronously across the network at each time step. This periodic structure enables real-time processing while simplifying timing management through regular, predictable operation cycles.
Solution Approach 2:
The continuous time domain is segmented into discrete time steps, allowing the system to process events in manageable temporal chunks. Each time step represents a discrete computational cycle where neuron states are updated and spikes are propagated, breaking down complex continuous-time dynamics into simpler discrete steps that are easier to control and implement.
Data Source
AI summary
The present invention provides an event-driven universal neural network circuit. The circuit comprises a plurality of neural modules. Each neural module comprises multiple digital neurons such that each neuron in a neural module has a corresponding neuron in another neural module. An interconnection network comprising a plurality of digital synapses interconnects the neural modules. Each synapse interconnects a first neural module to a second neural module by interconnecting a neuron in the first neural module to a corresponding neuron in the second neural module. Corresponding neurons in the first neural module and the second neural module communicate via the synapses. Each synapse comprises a learning rule associating a neuron in the first neural module with a corresponding neuron in the second neural module. A control module generates signals which define a set of time steps for event-driven operation of the neurons and event communication via the interconnection network.