Event-Driven Integrated Circuit With Programmable Interface Chain
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Solution Overview
Problem
Existing event-driven systems face challenges in designing versatile processing architectures due to interconnection complexities and high power consumption, particularly when integrating sensors and processors, leading to signal loss, noise interference, and increased chip size.
Innovation Solution
An integrated circuit design that integrates an event-driven sensor, interface system, and processor on a single chip or through an interposer, utilizing a programmable daisy chain of interface modules for efficient event processing and pre-processing, reducing signal loss and noise while minimizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If event-driven systems use conventional USB interfaces to connect sensors and processors, then adaptability between different components is improved, but power consumption increases and signal loss occurs
Solution Approach 1:
The patent integrates the sensor and processor into a single chip, eliminating the need for external USB interfaces and cables. This merging of components removes the power consumption associated with USB communication while maintaining full adaptability through on-chip event processing pathways.
Solution Approach 2:
The patent introduces an event-driven interface system as an intermediary layer between the sensor and processor. This interface system includes event processing units that handle data transmission internally, replacing the need for external USB communication while preserving component adaptability.
2Ease of operation
If event-driven systems use USB cables for connection, then ease of operation is improved, but signal loss and noise interference increase
Solution Approach 1:
By integrating the sensor and processor on a single chip, the patent eliminates USB cables entirely. The direct on-chip connection removes all signal loss and noise interference associated with external cable transmission, while the system remains easy to operate through unified control.
3Manufacturing precision
If event-driven systems integrate multiple components on separate chips, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The patent combines the sensor array, event processing units, and processor onto a single chip. This integration reduces device complexity by eliminating multiple separate components and their interconnections, while manufacturing precision is maintained through modern semiconductor fabrication processes.
4Speed
If event-driven systems use traditional clock-based processing architecture, then processing speed is improved, but power consumption increases
Solution Approach 1:
The patent implements event-driven periodic processing where the processor activates only when events occur rather than continuous clock-based operation. This allows fast processing响应 when needed while consuming minimal power during idle periods, achieving both speed and low power consumption.
Solution Approach 2:
The processing architecture dynamically adjusts its operation mode based on event occurrence. When events are detected, the system transitions to active processing mode for fast response; when no events occur, it enters low-power standby mode, optimizing both speed and power consumption dynamically.
Data Source
AI summary
The present disclosure relates to an event-driven integrated circuit that includes a sensor, an interface system, and a processor. The interface module includes a copy module, a merge module, a sub-sampling module, an ROI module, and an event routing module. The modules constitute a programmable daisy chain. The sensor, interface system and processor are coupled to a single chip through an interposer or manufactured in a same die by different manufacturing processes. In contrast to prior art, the event-driven integrated circuit with lower chip occupied area and manufacturing cost can eliminate the signal loss and noise interference, and achieve high-speed signal processing, solving the technical problems of larger chip area and weak signal processing ability. The interface system enriches the functions and configurability of the interface system, and provides various advantages in power consumption, function, and speed for subsequent processing.