Execution Engine Synchronization via Event Registers

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Solution Overview

Problem

Integrated circuit devices with multiple computation engines face challenges in synchronizing operations due to limited memory and resource dependencies, leading to increased complexity and chip area usage with traditional synchronization methods like semaphores and queues.

Innovation Solution

The use of event registers and instructions such as 'set-event' and 'wait-on-event' allows for synchronization of execution engines without specialized synchronization circuitry, leveraging hardware registers to manage dependencies and reduce chip area usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional synchronization methods like semaphores and queues are used, then synchronization between computation engines is achieved, but chip area and device complexity increase

Engineering Contradiction:
Improvesynchronization correctnessVSAvoidsynchronization circuitry complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the synchronization function from specialized circuitry (semaphores and queues) and implements it using general-purpose hardware registers. By removing the dedicated synchronization components and replacing them with register-based event signaling, the device complexity and chip area are reduced while maintaining synchronization correctness between computation engines.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent makes hardware registers serve multiple purposes: they function as both data storage elements and synchronization event indicators. By enabling registers to signal event completion that can be detected by wait instructions, the same register infrastructure supports both computation data management and synchronization, eliminating the need for separate synchronization circuitry.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If traditional synchronization methods like semaphores and queues are used, then synchronization between computation engines is achieved, but chip area usage increases

Engineering Contradiction:
Improvesynchronization correctnessVSAvoidchip area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the synchronization functionality with the existing register file infrastructure. Instead of implementing separate semaphore and queue circuits that would occupy additional chip area, the event registers utilize the same physical register resources already present in the processor, thereby achieving synchronization without increasing chip area.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent removes dedicated synchronization circuitry (semaphores and queues) from the chip design and replaces their functionality with register-based event signaling. This extraction of specialized components eliminates the additional chip area that would be required for traditional synchronization methods.

Inventive Principle:
Principle #2Taking out (Extraction)

3Productivity

If computation engines operate independently without synchronization, then execution speed increases, but operation correctness decreases due to resource dependencies

Engineering Contradiction:
Improveexecution speedVSAvoidoperation correctness
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements preliminary synchronization actions through event setting and waiting instructions. Before a computation engine proceeds with operations that depend on resources produced by another engine, it executes a wait instruction that checks for the corresponding event. This preliminary check ensures resource availability before computation begins, maintaining operation correctness while allowing independent execution otherwise.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent establishes a feedback mechanism where computation engines signal event completion to other engines. When an engine produces resources or completes an operation, it sets an event that serves as feedback to dependent engines. This feedback loop enables engines to operate independently until the feedback signal confirms resource availability, thereby maintaining both speed and correctness.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11061654B1Synchronization of concurrent computation engines
Publication Date: 2021.07.13 AMAZON TECH INC
  • US11061654B1 patent drawing
  • US11061654B1 patent drawing
  • US11061654B1 patent drawing

AI summary

Provided are systems and methods for synchronizing program code execution for a plurality of execution engines in an integrated circuit device. In some cases, the operation of one execution engine may be dependent on the operation of another execution engine. To accommodate this dependency, the instructions for the first execution engine can include a set-event instruction and the instructions for the second execution engine can include a wait-on-event instruction. The wait-on-event instruction can cause the second execution engine to wait for the first execution engine to reach the set-event instruction. In this way, the two execution engines can be synchronized around the data or resource dependency.