Event Trigger Master Reduces Processor Interruptions

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The frequent interruption of processor operations by event notices from peripheral circuits reduces processor efficiency, as it constantly stops and restarts program code execution to manage these events.

Innovation Solution

An event trigger master is introduced, comprising an event receiving interface, a storage element with a command queue, and a state machine that manages event requests, allowing the processor to focus on other tasks by handling peripheral device operations independently through a master interface and peripheral system bus.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the processor directly responds to event requests from peripheral devices, then the system can handle events in real-time, but the processor efficiency deteriorates due to frequent interruptions

Engineering Contradiction:
Improveevent response capabilityVSAvoidprocessor efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent introduces an event trigger master as an intermediary component between peripheral devices and the processor. This master receives event requests from peripheral devices, stores them in a queue, and manages them independently, preventing direct interruptions to the processor. The processor only receives notifications when command queues are empty or full, significantly reducing interruption frequency while maintaining event response capability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments the event handling function into separate components: the event trigger master handles individual event requests and command execution, while the processor focuses on high-level control. This segmentation allows the processor to avoid being bogged down by frequent event interruptions, improving its overall efficiency while events are handled by the specialized master component.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the processor continuously monitors and responds to event notices, then all events are handled promptly, but the operation time for other tasks is reduced

Engineering Contradiction:
Improveevent handling completenessVSAvoidprocessor operation time
Core Design Contradiction:
ReliabilityVSDuration of action of moving object

Solution Approach 1:

The event trigger master is designed to autonomously manage event requests without requiring continuous processor intervention. It independently receives events, determines whether command queues are full, executes commands, and only notifies the processor when the queue state changes (empty or full). This self-service capability allows the processor to dedicate more time to other tasks while ensuring complete event handling.

Inventive Principle:
Principle #25Self-service

3Manufacturing precision

If the processor handles all event-driven tasks directly, then control precision is maintained, but the complexity of the processor increases

Engineering Contradiction:
Improvecontrol precisionVSAvoidprocessor complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent extracts the complex event handling logic from the processor and relocates it to a dedicated event trigger master. This master manages the command queues, executes commands, and handles event routing, thereby reducing processor complexity. The processor maintains control precision by receiving notifications of queue state changes and performing high-level control operations when needed.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS12164443B2Event trigger master, control chip and control method thereof
Publication Date: 2024.12.10 NUVOTON
  • US12164443B2 patent drawing
  • US12164443B2 patent drawing
  • US12164443B2 patent drawing

AI summary

An event trigger master coupled to a first peripheral device and including an event receiving interface, a storage element, a state machine, and a master interface is provided. The event receiving interface is configured to receive an event request. The storage element includes a command queue to store a set command. The state machine performs the set command to access the first peripheral device or a second peripheral device in response to the event request being triggered. The master interface is coupled to the state machine, the first peripheral device, and the second peripheral device. The state machine accesses the first or second peripheral device via the master interface.