Eviction Control for Address Translation Cache Entries
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Solution Overview
Problem
Existing data processing systems face inefficiencies in managing the eviction of address translation entries from address translation caches, which consume circuit resources and require optimized eviction strategies to maximize cache capacity.
Innovation Solution
Implementing eviction control circuitry that selects victim entries based on specific eviction control parameters associated with different types of address translation entries, depending on their levels of translation within a multiple-level page table walk, to efficiently manage cache usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If address translation cache is used to store address translation entries, then the number of page table walks is reduced and performance is improved, but circuit resources are consumed
Solution Approach 1:
The patent changes the parameters of eviction control by introducing entry-type-dependent eviction control parameters. Different entry types (e.g., stage 1 walk cache entries, stage 2 walk cache entries, large page entries, small page entries) are assigned different eviction control parameter values, allowing the system to optimize cache retention and eviction behavior for different translation scenarios, thereby improving performance while efficiently managing cache capacity
2Quantity of substance
If address translation cache capacity is increased, then more translations can be cached and page table walks are reduced, but circuit resources are increased
Solution Approach 1:
The patent applies local quality by treating different entry types within the cache differently through entry-type-dependent eviction control parameters. Instead of uniform eviction policy, the system selectively applies different eviction control strategies to different entry types (e.g., retaining large page entries longer, evicting small page entries more readily), optimizing the use of cache capacity without increasing physical cache size
3Device complexity
If eviction control is simplified, then device complexity is reduced, but cache efficiency is degraded
Solution Approach 1:
The patent introduces entry-type-dependent eviction control parameters that add sophistication to eviction control without significantly increasing hardware complexity. The eviction control circuitry determines entry type and selects appropriate eviction control parameter values, enabling efficient cache management through a relatively simple mechanism that adapts to different translation scenarios
Data Source
AI summary
A data processing system 2 includes an address translation cache 12 to store a plurality of address translation entries. Eviction control circuitry 10 selects a victim entry for eviction from address translation cache 12 using an eviction control parameter. The address translation cache 12 can store multiple different types of entry corresponding to respective different levels of address translation within a multiple-level page table walk. The different types of entry have different eviction control parameters assigned at the time of allocation. Eviction from the address translation cache is dependent upon the entry type, as well as the subsequent accesses to the entry concerned and the other entries within the address translation cache.