Embedded Wafer-Level Ball-Grid Array Antenna Integration

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Solution Overview

Problem

The manufacturing of semiconductor devices with integrated radar features faces challenges in reducing manufacturing cost and complexity due to the need for proper antenna and shielding design on printed circuit boards, which increases costs and complexity, especially in applications like self-driving vehicles.

Innovation Solution

The integration of a self-defined antenna and backside redistribution layer within an embedded wafer-level ball-grid array (eWLB) package, which allows for the formation of a radar transceiver package with a semiconductor die and antenna on a single substrate, reducing the need for separate antenna and shielding components and simplifying the manufacturing process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If antenna and shielding components are designed separately on printed circuit board, then proper radar functionality is achieved, but manufacturing cost and complexity increase

Engineering Contradiction:
Improveradar functionalityVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the antenna structure and shielding structure into a single integrated component. The antenna elements are formed on a substrate with integrated ground planes and shielding structures that provide both radar functionality and EMI protection in one unified design, eliminating the need for separate antenna and shielding components on the printed circuit board.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The integrated antenna-shielding structure serves multiple functions simultaneously: it acts as the radar antenna for signal transmission and reception, provides EMI shielding to protect sensitive circuits, and serves as part of the grounding system. This multi-functional design reduces the overall component count and simplifies manufacturing.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If antenna and shielding components are designed separately on printed circuit board, then proper radar functionality is achieved, but manufacturing cost increases

Engineering Contradiction:
Improveradar functionalityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent combines the antenna structure and shielding structure into a single integrated component. The antenna elements are formed on a substrate with integrated ground planes and shielding structures that provide both radar functionality and EMI protection in one unified design, eliminating the need for separate antenna and shielding components on the printed circuit board.

Inventive Principle:
Principle #5Merging (Combining)

3Object-affected harmful factors

If separate antenna and shielding components are used, then proper EMI protection is achieved, but device footprint increases

Engineering Contradiction:
ImproveEMI protectionVSAvoidpackage footprint
Core Design Contradiction:
Object-affected harmful factorsVSArea of stationary object

Solution Approach 1:

The patent combines the antenna structure and shielding structure into a single integrated component. The antenna elements are formed on a substrate with integrated ground planes and shielding structures that provide both radar functionality and EMI protection in one unified design, eliminating the need for separate antenna and shielding components on the printed circuit board.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10211171B2Antenna in embedded wafer-level ball-grid array package
Publication Date: 2019.02.19 STATS CHIPPAC LTD
  • US10211171B2 patent drawing
  • US10211171B2 patent drawing
  • US10211171B2 patent drawing

AI summary

A semiconductor device has a semiconductor die and an encapsulant deposited over the semiconductor die. A first conductive layer is formed with an antenna over a first surface of the encapsulant. A second conductive layer is formed with a ground plane over a second surface of the encapsulant with the antenna located within a footprint of the ground plane. A conductive bump is formed on the ground plane. A third conductive layer is formed over the first surface of the encapsulant. A fourth conductive layer is formed over the second surface of the encapsulant. A conductive via is disposed adjacent to the semiconductor die prior to depositing the encapsulant. The antenna is coupled to the semiconductor die through the conductive via. The antenna is formed with the conductive via between the antenna and semiconductor die. A PCB unit is disposed in the encapsulant.