EWLB Package with Slotted Metal Carrier Interposer
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Solution Overview
Problem
Current semiconductor manufacturing processes for building-up interconnect structures in fan-out wafer level chip scale packages are costly and time-consuming, leading to long cycle times and increased defects due to temporary bonding methods, which also fail to effectively address electromagnetic interference and heat dissipation in high-frequency devices.
Innovation Solution
A method for creating a semiconductor device with a conductive substrate, where a semiconductor die is disposed over the substrate, an encapsulant is deposited, and a first interconnect structure is formed, followed by forming openings in the substrate to isolate portions electrically connected to the interconnect structure, and forming bumps over the interconnect structure, which simplifies and cost-effectively addresses interconnect needs while providing improved heat dissipation and EMI shielding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If temporary bonding methods are used in current semiconductor manufacturing processes, then manufacturing cost and cycle time are reduced, but manufacturing precision and reliability deteriorate due to increased defects
Solution Approach 1:
The patent removes the temporary bonding step entirely from the manufacturing process. The carrier substrate serves as a permanent support structure that allows direct formation of interconnect structures without requiring temporary attachment and subsequent removal, thereby eliminating the source of defects while maintaining high productivity
Solution Approach 2:
The carrier substrate performs multiple functions simultaneously: it provides mechanical support during manufacturing, serves as a platform for direct interconnect structure formation, and acts as part of the final package structure. This eliminates the need for separate temporary bonding materials and processes, improving both efficiency and precision
2Ease of manufacture
If conventional interconnect structures are used in fan-out wafer level chip scale packages, then manufacturing cost increases and cycle time lengthens, but device functionality is maintained
Solution Approach 1:
The interconnect structures are formed directly on the carrier substrate before the semiconductor die is mounted. This preliminary formation of interconnect structures eliminates subsequent bonding and wire bonding steps, reducing both manufacturing cost and cycle time while maintaining full device functionality
Solution Approach 2:
The patent merges the carrier substrate function with the interconnect structure support function. By forming interconnect structures directly on the carrier substrate, multiple manufacturing steps are combined into one, reducing overall manufacturing cost and cycle time
3Object-affected harmful factors
If standard packaging processes are used, then electromagnetic interference shielding is insufficient, but manufacturing complexity increases
Solution Approach 1:
The conductive carrier substrate simultaneously provides mechanical support, electrical interconnection, and electromagnetic interference shielding. This multi-functionality achieves effective EMI shielding without adding separate shielding layers or complex manufacturing steps
Solution Approach 2:
The use of conductive materials for the carrier substrate creates a composite structure that combines mechanical support properties with electromagnetic shielding properties. This single material solution provides both structural integrity and EMI protection without increasing manufacturing complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing costs and cycle times, enhances heat dissipation, and minimizes defects by using a conductive substrate to support the semiconductor device, while also providing effective electromagnetic interference shielding.
Implementation Method 1
providing improved heat dissipation
Implementation Method 2
providing effective electromagnetic interference shielding
Data Source
AI summary
A semiconductor device has a semiconductor die. The semiconductor die is disposed over a conductive substrate. An encapsulant is deposited over the semiconductor die. A first interconnect structure is formed over the encapsulant. An opening is formed through the substrate to isolate a portion of the substrate electrically connected to the first interconnect structure. A bump is formed over the first interconnect structure. Conductive vias are formed through the encapsulant and electrically connected to the portion of the substrate. A plurality of bumps is formed over the semiconductor die. A first conductive layer is formed over the encapsulant. A first insulating layer is formed over the first conductive layer. A second conductive layer is formed over the first insulating layer and first conductive layer. A second insulating layer is formed over the first insulating layer and second conductive layer. Protrusions extend above the substrate.