EWLB Package Standoff Conductive Layer Over Encapsulant Bumps
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Solution Overview
Problem
The existing semiconductor device packaging methods face challenges in achieving smaller device sizes due to defects such as cracking, debonding, and bridging during the formation of interconnect bumps, which increases manufacturing costs and reduces yield.
Innovation Solution
A method involving a carrier with recesses, a conductive layer, and an encapsulant to form encapsulant bumps, allowing for the removal of the carrier to expose the conductive layer, which is then connected to contact pads on the semiconductor die without traditional bumps, enabling a standoff conductive layer over encapsulant bumps for improved packaging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If interconnect bumps are formed to electrically interconnect semiconductor die and substrates, then electrical connection is achieved, but defects such as cracking, debonding, and bridging occur which lowers manufacturing yield and increases cost
Solution Approach 1:
The patent removes the traditional interconnect bump structure from the packaging process. Instead of forming separate bumps for electrical interconnection, the invention uses the encapsulant material itself to provide both mechanical support and electrical connection pathways, thereby eliminating the defects associated with bump formation while maintaining manufacturing yield.
Solution Approach 2:
The invention merges the functions of the encapsulant and the interconnect structure into a single integrated system. The encapsulant material serves dual purposes: providing environmental protection and mechanical support while simultaneously establishing electrical connections through conductive pathways within the encapsulant, eliminating the need for separate bump structures.
2Reliability
If interconnect bumps are formed to achieve electrical interconnection, then electrical connection is established, but additional processing steps are required which increases device complexity and cost
Solution Approach 1:
The patent combines multiple functions into the encapsulant material: environmental protection, mechanical support, and electrical interconnection. This integration eliminates the need for separate bump formation processes, reducing packaging process complexity while maintaining reliable electrical connections through conductive pathways within the encapsulant.
Solution Approach 2:
The encapsulant material is designed to perform multiple functions simultaneously: protecting the semiconductor die from environmental factors, providing mechanical support, and establishing electrical connections. This multi-functionality reduces the overall complexity of the packaging process by eliminating the need for specialized interconnect structures.
3Reliability
If traditional bump formation processes are used for mounting semiconductor die, then electrical connection is achieved, but the process is subject to defects which increases manufacturing cost
Solution Approach 1:
The invention extracts and removes the problematic bump formation step from the manufacturing process. By using the encapsulant material to provide both mechanical and electrical functions, the process eliminates defect-prone bump formation while reducing manufacturing costs through process simplification and higher yield.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the creation of smaller semiconductor devices with reduced defects, lower manufacturing costs, and increased yield by eliminating the need for interconnect bumps, while providing a stable and efficient electrical connection.
Implementation Method 1
depositing an encapsulant over the carrier and semiconductor die. The encapsulant extends into the recesses over the first conductive layer
Implementation Method 2
conformally applying a first conductive layer over a surface of the carrier and into the recesses
Data Source
AI summary
A semiconductor device has a carrier with a die attach area. Recesses are formed partially through the carrier outside the die attach area. A first conductive layer is conformally applied over a surface of the carrier and into the recesses. A semiconductor die is mounted to the die attach area of the carrier. An encapsulant is deposited over the carrier and semiconductor die. The encapsulant extends into the recesses over the first conductive layer to form encapsulant bumps. The carrier is removed to expose the first conductive layer over the encapsulant bumps. A first insulating layer is formed over the semiconductor die with openings to expose contact pads of the semiconductor die. A second conductive layer is formed between the first conductive layer and the contact pads on the semiconductor die. A second insulating layer is formed over the second conductive layer and semiconductor die.