Exact-Match Flow Table IC for Network Switching Efficiency
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Solution Overview
Problem
Existing packet switching technologies face inefficiencies in handling packets due to the lack of exact-match flow tables that can store wildcard indicators or mask values, leading to increased switching congestion and power consumption in network devices.
Innovation Solution
An integrated circuit with an exact-match flow table structure that uses Static Random Access Memory (SRAM) to store flow entries with unique Flow IDs, where each bit of the Flow ID is stored in one cell, and generates a Flow ID from incoming packets for bit-by-bit matching, with optional use of multiplexer and programmable reduce table circuits for packet classification and lookup operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If wildcard indicators or mask values are stored in flow tables, then packet matching flexibility is improved, but memory complexity and power consumption increase
Solution Approach 1:
The flow table is segmented into multiple smaller SRAM structures, each handling specific flow entries. This segmentation reduces the complexity of any single memory structure while maintaining the overall flexibility of the system through distributed storage and lookup mechanisms.
Solution Approach 2:
Wildcard indicators and mask values are extracted from the main flow table storage and handled through separate lookup mechanisms. The exact-match flow table stores only precise flow identifiers, while wildcard matching is performed through dedicated circuitry that compares packet fields against flow table entries without requiring stored mask values for each entry.
2Adaptability or versatility
If traditional flow tables with wildcard support are used, then packet classification versatility is improved, but switching congestion and power consumption increase
Solution Approach 1:
The flow table lookup operation is performed in discrete periodic stages: first exact-match lookup in SRAM, then wildcard-match lookup only if needed. This periodic action structure reduces average power consumption by avoiding unnecessary comparisons and memory access operations for packets that match exact-flow entries.
Solution Approach 2:
Wildcard matching functionality is extracted as a separate lookup phase that is only activated when exact-match lookup fails. This extraction allows the system to maintain packet classification versatility while reducing power consumption by avoiding wildcard comparison operations for the majority of packets that match exact-flow entries.
3Device complexity
If exact-match flow tables without wildcard indicators are used, then memory requirements and complexity are reduced, but packet matching flexibility is limited
Solution Approach 1:
A dedicated lookup circuit acts as an intermediary between the exact-match flow table and packet classification requirements. This circuit performs bit-by-bit comparison of packet fields against flow table entries and can implement wildcard matching logic without requiring wildcard indicators to be stored in the SRAM, thus maintaining memory simplicity while achieving matching flexibility.
Solution Approach 2:
Flow table entries are copied from a compact SRAM storage structure to a lookup structure that supports flexible matching operations. The SRAM stores only essential flow identifiers in a space-efficient format, while the lookup circuitry implements the matching logic, separating storage simplicity from matching flexibility.
Data Source
AI summary
An exact-match flow table structure of an integrated circuit stores flow entries. Each flow entry includes a Flow Id and an action value. Each Flow Id is a multi-bit digital value that uniquely identifies a flow. A Flow Id does not include any wildcard indictor. The flow table structure cannot and does not store an indicator that any particular part of a packet should be matched against any part of a Flow Id. In one example, a packet is received onto the integrated circuit. A Flow Id is generated from the packet. If the flow table structure determines that the Flow Id is a bit-by-bit exact-match of any Flow Id of any stored flow entry, then the packet is handled according to the action value of the flow entry. If, on the other hand, there is not exact-match, then a miss indication is output from the integrated circuit.