Exception Handling in Dynamic Binary Translation
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Solution Overview
Problem
Existing program code conversion methods, particularly in dynamic binary translation, face significant overhead in handling exceptions due to the need for precise state recovery, which is restrictive and costly, often requiring specific hardware support and inefficient recovery mechanisms.
Innovation Solution
The method involves generating target code with counterpart instructions and associated recovery information to rectify a precise subject state upon exceptions, using a recovery information mechanism that accounts for optimizations and stores information efficiently, allowing for precise exception handling without extensive overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional exception handling mechanisms are used in program code conversion, then exception handling capability is provided, but overhead is significant and performance is degraded
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing exception information (exception PC, exception type, and restored register values) at each exception point during the code conversion process. This pre-computation eliminates the need for complex runtime state recovery, allowing exceptions to be handled efficiently by simply retrieving pre-stored information rather than reconstructing processor state from scratch.
Solution Approach 2:
The patent uses copying by creating a simplified copy of exception handling information rather than maintaining full processor state. Instead of copying and managing complete register files and processor contexts, the invention copies only the essential exception handling data (exception PC, type, and critical register values) into a compact data structure, significantly reducing the overhead of exception management.
2Measurement precision
If precise state recovery is implemented during exception handling, then precise exception handling is achieved, but complexity and overhead increase
Solution Approach 1:
The patent applies segmentation by dividing the exception handling information into distinct, manageable components: exception PC (program counter), exception type (fault, trap, interrupt), and restored register values. This segmentation allows each component to be handled independently and stored in optimized data structures, reducing the complexity of managing complete processor state while maintaining precise exception handling capability.
Solution Approach 2:
The patent changes parameters by transforming the detailed processor state into a simplified exception information representation. Instead of maintaining full register files, memory states, and processor flags, the invention converts these into parameterized exception records containing only the essential information needed for precise exception handling, thereby reducing complexity while preserving accuracy.
3Measurement precision
If hardware support is extended for exception handling, then exception handling precision is improved, but cost and device complexity increase
Solution Approach 1:
The patent introduces an intermediary mechanism - a software-based exception information storage structure that mediates between the processor and exception handling requirements. This intermediary data structure (containing exception PC, type, and register values) serves as a buffer that eliminates the need for complex hardware support, allowing precise exception handling to be achieved through software-managed data structures rather than hardware extensions.
4Reliability
If recovery mechanisms are made comprehensive, then exception recovery accuracy is improved, but time overhead increases
Solution Approach 1:
The patent applies preliminary action by pre-computing all recovery information (exception PC, exception type, and restored register values) during the code conversion phase. This pre-computation ensures that when an exception occurs at runtime, the processor can immediately retrieve the pre-calculated recovery information without performing time-consuming state reconstruction, thereby maintaining high recovery accuracy while minimizing time overhead.
Data Source
AI summary
Precise exception handling relies on a precise subject state including an accurate program counter and register values of a subject processor. Subject code (17) is translated into target code (21) executable by a target processor (13). The generated target code (17) includes counterpart target instructions (214) associated with fault-vulnerable subject code instructions (174). Further, each of the counterpart target code instruction (214) is associated with recovery information (195). When an exception (e.g. a fault) occurs, the recovery information (195) is retrieved and used to recover a precise subject state, in particular by taking account of optimizations to generate the common-case target code (21). The precise subject state is then used to precisely handle the exception.