Exception Handling Security via Processor Isolation

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Existing systems face challenges in securely handling exception events, as less trusted code may gain access to more trusted code's data, and current methods do not adequately isolate sensitive information during exception handling, potentially leading to security breaches.

Innovation Solution

A system comprising two processing units, where the first processing unit enters a halted mode and issues a trigger event, allowing the second processing unit to execute an exception handling routine with direct access to the first processing unit's state information via a control interface, thereby offloading exception handling and maintaining security by preventing the first processing unit from transitioning to a higher exception level.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the first processing unit transitions to a higher exception level to handle the exception, then the exception can be handled with appropriate privileges, but the less trusted code may gain access to more trusted code's data through the transition

Engineering Contradiction:

Improveexception handling capabilityVSAvoidsecurity risk

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The exception handling functionality is extracted from the first processing unit and relocated to a second processing unit. When an exception occurs, the first processing unit enters a halted mode and the second processing unit executes the exception handling routine, preventing the first unit from transitioning to higher privilege levels while maintaining proper exception handling.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

A control interface is introduced as an intermediary between the first and second processing units. This interface provides direct mapped access to the state information of the first processing unit, allowing the second unit to modify state as required by exception handling routines without compromising security boundaries.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If the first processing unit executes the exception handling routine itself, then the handling is straightforward and fast, but security is compromised due to potential access to sensitive data

Engineering Contradiction:

Improveexception handling efficiencyVSAvoidunauthorized data access

Core Design Contradiction:

ProductivityVSObject-affected harmful factors

Solution Approach 1:

The processing functionality is segmented into two separate processing units with distinct roles. The first processing unit executes trusted program code while the second processing unit handles exceptions, creating a clear separation of duties that maintains both security and efficiency.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The control interface provides the second processing unit with direct mapped access to copies of the state information from the first processing unit. This allows efficient reading and modification of state without the first unit needing to transition to higher privilege levels.

Inventive Principle:

Principle #26Copying

3Object-affected harmful factors

If the first processing unit remains in halted mode for extended periods to maintain security, then security is improved, but system productivity decreases due to execution delays

Engineering Contradiction:

Improvesecurity protectionVSAvoidprogram execution speed

Core Design Contradiction:

Object-affected harmful factorsVSProductivity

Solution Approach 1:

The system prepares for exception handling in advance by having the control interface and second processing unit ready to immediately handle exceptions when they occur. This preliminary preparation allows the first processing unit to quickly resume execution after exceptions without prolonged halting.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The second processing unit autonomously handles exception routines by directly accessing and modifying the state information of the first processing unit through the control interface, enabling rapid exception resolution without requiring extended halting of the first unit.

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS11630673B2System and method for physically separating, across different processing units, software for handling exception causing events from executing program code

Publication Date: 2023.04.18 ARM LTD

AI summary

A first processor for executing program code has a control interface mapped to the memory address space of a second processor and provides the second processor with direct mapped access to state information of the first processor. The first processor responds to an exception causing event to enter a halted mode stopping execution of the program code and issuing a trigger event. The second processor responds to the trigger to execute an exception handling routine during which the second processor accesses and modifies the state information via the control interface as required by the exception handling routine. On completion of the exception handling routine, the second processor causes the first processor to exit the halted mode and resume execution of the program code. Thus, the program code is physically separated from the software used to perform the exception handling routine to improve security.