Exception Return Instruction Variants for Realm Switching
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Solution Overview
Problem
Current memory access control techniques fail to effectively enforce ownership rights for memory regions across different privilege levels, leading to potential unauthorized access and data security breaches.
Innovation Solution
The implementation of a realm management system that divides the memory address space into realms, where each realm has exclusive ownership and control over its memory regions, using realm management units to enforce access rights and switch processing between realms, ensuring that higher privileged processes cannot access data owned by lower privileged realms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If memory access control is based on privilege level, then higher privileged processes can exclude less privileged processes from accessing memory regions, but ownership rights for memory regions cannot be effectively enforced across different privilege levels
Solution Approach 1:
The patent segments the memory address space into distinct realms, where each realm is owned by a specific process. This segmentation allows ownership rights to be enforced independently of privilege levels, as each realm has a clear owner that can control access to its memory regions regardless of the privilege level of accessing processes.
Solution Approach 2:
The patent introduces a new dimension of control by adding realm ownership as an additional layer beyond the traditional privilege level model. This creates a two-dimensional access control system where both privilege level and realm ownership must be considered, allowing ownership rights to be enforced across different privilege levels by checking realm ownership rather than relying solely on privilege hierarchies.
2Reliability
If a realm management system divides memory address space into realms with exclusive ownership, then unauthorized access is prevented, but system complexity increases due to realm switching mechanisms
Solution Approach 1:
The exception return instruction is designed to be universal, serving multiple functions: it can return to the original exception handler within the same realm, or it can switch to a different realm before returning. This multi-functionality reduces the need for separate instruction variants and simplifies the overall system complexity while maintaining secure realm switching capabilities.
Solution Approach 2:
The realm switching mechanism is integrated into the exception handling process itself, allowing the system to automatically manage realm transitions during exception returns. The processing circuitry automatically determines whether to switch realms based on the exception return instruction, reducing the need for additional complex control logic and making the system self-managing.
3Ease of operation
If exception return instruction always returns to the same realm, then processing is simple, but realm switching capability is lost
Solution Approach 1:
The exception return instruction is made dynamic by providing different variants that can behave differently based on the situation. The first variant returns to the same realm for simple cases, while the second variant enables realm switching when needed. This dynamic behavior allows the system to adapt to different operational requirements without sacrificing simplicity in common cases.
Solution Approach 2:
Different variants of the exception return instruction are provided to handle different local requirements. The first variant is optimized for simple same-realm returns, while the second variant is designed for realm switching scenarios. This local differentiation allows each instruction variant to be optimized for its specific purpose while maintaining overall system versatility.
Data Source
AI summary
Memory access circuitry enforces ownership rights for memory regions. A given memory region is associated with an owner realm specified from multiple realms, each realm corresponding to a portion of at least one software process executed by processing circuitry. In response to a first variant of an exception return instruction the processing circuitry returns from processing of an exception while staying within the same realm. In response to a second variant of the exception return instruction the processing circuitry switches processing from a current realm to a destination realm.