Executable Adaptation Across Processor Architectures Using Performance Metrics

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Solution Overview

Problem

Current graphics processing units (GPUs) face challenges in efficiently processing a wide variety of operations due to their fixed function computational units, limiting their performance and flexibility in handling graphics and general-purpose computations.

Innovation Solution

Implementing a general-purpose graphics processing unit (GPGPU) with programmable components and parallel processing techniques, such as SIMT architectures, to enhance the GPU's capability to handle diverse operations, including graphics processing and machine-learning tasks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If fixed function computational units are used in GPUs, then device complexity is reduced and manufacturing is easier, but adaptability and versatility are limited

Engineering Contradiction:
Improvecapability to handle diverse operationsVSAvoidcomputational unit structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a unified computational unit architecture that can dynamically switch between different operational modes (graphics processing, general-purpose computing, machine learning) through programmable control, allowing a single hardware structure to perform multiple functions that would traditionally require separate dedicated units

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If programmable components are implemented to increase versatility, then adaptability improves, but device complexity increases

Engineering Contradiction:
Improveoperational flexibilityVSAvoidprocessing unit structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The computational units are designed with dynamic reconfigurability, allowing their functional behavior to be changed at runtime through program instructions rather than requiring static hardware configuration, enabling the same physical structure to adapt to different computational tasks

Inventive Principle:
Principle #15Dynamics

3Productivity

If parallel processing techniques are implemented, then productivity increases, but device complexity increases

Engineering Contradiction:
Improveprocessing throughputVSAvoidprocessing architecture
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The processing architecture is divided into multiple independent computational units that can operate in parallel, with each unit capable of handling discrete threads or tasks simultaneously, thereby increasing overall throughput while maintaining manageable complexity through modular design

Inventive Principle:
Principle #1Segmentation

4Productivity

If multiple threads are executed simultaneously, then productivity increases, but ease of operation becomes more complex

Engineering Contradiction:
Improveparallel execution capabilityVSAvoidthread management
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The system implements automatic thread scheduling and resource allocation mechanisms that manage multiple concurrent threads without requiring manual intervention, with the hardware itself handling thread dispatch, synchronization, and resource management to maintain ease of operation while achieving high parallel productivity

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12530204B2System and method for adapting executable object to a processing unit
Publication Date: 2026.01.20 INTEL CORP
  • US12530204B2 patent drawing
  • US12530204B2 patent drawing
  • US12530204B2 patent drawing

AI summary

Embodiments are generally directed to a system and method for adapting executable object to a processing unit. An embodiment of a method to adapt an executable object from a first processing unit to a second processing unit, comprises: adapting the executable object optimized for the first processing unit of a first architecture, to the second processing unit of a second architecture, wherein the second architecture is different from the first architecture, wherein the executable object is adapted to perform on the second processing unit based on a plurality of performance metrics collected while the executable object is performed on the first processing unit and the second processing unit.