Executable Patching With Padding For Memory Constrained Devices

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing methods for updating firmware and software in embedded systems often result in large patches that consume excessive memory, making it difficult to apply updates on resource-constrained devices due to the need for significant memory allocation for patches that change function or data offsets.

Innovation Solution

The system generates executables with padding between functions and data, allowing them to grow without changing memory locations, thus reducing the size of patches and enabling more efficient memory use by allocating unused memory regions for updates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If patches are generated to update firmware with changed functions or data offsets, then the firmware can be updated to fix bugs and add new functionality, but the patch size becomes nearly the size of the original executable, consuming excessive memory on resource-constrained devices

Engineering Contradiction:
Improvefirmware update capabilityVSAvoidmemory consumption
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patch is segmented into two parts: a relocation information structure (small) and the original executable (large). The relocation information contains only the necessary offset adjustments and function/data relocation data, which is applied separately from the main executable code. This segmentation allows the update mechanism to work with minimal additional memory beyond what the original executable requires.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the parameter representation by using a relocation information structure that stores offset adjustments as parameters rather than rewriting entire function bodies or data sections. The relocation info contains structured parameters (original offset, new offset, type) that describe changes without duplicating the actual code or data, significantly reducing the memory footprint of patches.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If patches are applied to executables with added instructions or changed data, then new functionality can be implemented, but all functions and data after the changed instructions have different offsets, requiring changes to all reference instructions throughout the executable

Engineering Contradiction:
Improvefunctionality updateVSAvoidpatch application complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent introduces a relocation information structure as an intermediary between the original executable and the patched version. This intermediary contains structured relocation records that describe offset changes, new functions, and data modifications. The patching process uses this intermediary to systematically update references without manually analyzing and modifying every instruction, greatly simplifying the complexity of handling offset changes throughout the executable.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The relocation information is prepared in advance during the patch generation process, organizing all necessary offset adjustments and relocation data before the actual patching occurs. This preliminary organization of relocation parameters allows the patching mechanism to efficiently apply changes without complex real-time calculations or analysis of reference instructions during the update process.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9268552B1Patching improvement for executables in memory constrained devices
Publication Date: 2016.02.23 AYLA NETWORKS INC
  • US9268552B1 patent drawing
  • US9268552B1 patent drawing
  • US9268552B1 patent drawing

AI summary

A processing device determines a memory layout for an executable comprising a plurality of functions and data, wherein the memory layout is determined based on one or more object files. The processing device updates the memory layout by inserting an unused memory region between a first function and a second function of the plurality of functions in the memory layout, wherein the first function and the second function have adjacent memory locations in the memory layout prior to insertion of the unused memory region. The processing device resolves references between the plurality of functions. The processing device then generates an executable comprising the plurality of functions and the data arranged in accordance with the memory layout, the executable having the resolved references.