Execution Mode Transition Control for Privilege-Based Code Isolation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current computer processor circuits face challenges in efficiently and securely managing execution mode transitions while maintaining isolation between disparate software components, particularly in scenarios involving shared virtual memory, without incurring context switch overhead.
Innovation Solution
Implementing a processor circuit with an execution mode index management system that stores separate execution mode transition information for different privilege levels, allowing or disallowing transitions based on current privilege level and transition directionality, using an execution mode index to manage permissions dynamically.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If execution mode transitions are allowed between different privilege levels, then software flexibility and functionality are improved, but system security and isolation are worsened
Solution Approach 1:
The patent segments the execution mode transition control by creating separate storage locations for transition information corresponding to different privilege levels. The execution mode index management circuit accesses privilege-level-specific transition information to determine whether transitions are allowed, thereby segmenting the security control mechanism to maintain isolation while enabling flexibility where appropriate.
Solution Approach 2:
The patent applies local quality by allowing different transition policies for different privilege levels. Each privilege level has its own transition information stored in separate locations, enabling the system to apply permissive policies where security allows and restrictive policies where security requires, rather than using a uniform policy across all privilege levels.
2Measurement precision
If separate execution mode transition information is stored for different privilege levels, then transition control precision is improved, but device complexity is worsened
Solution Approach 1:
The patent merges the execution mode index management functionality with the existing memory management unit (MMU) and execution mode index register. By integrating the transition information storage and access control into existing processor structures rather than adding completely separate components, the patent reduces the impact of device complexity while maintaining precise transition control.
Solution Approach 2:
The execution mode index register and management circuit are designed to serve multiple functions: managing execution mode transitions, maintaining code isolation, and controlling memory access permissions. This multi-functionality reduces the need for separate dedicated components for each function, thereby managing device complexity while achieving precise transition control.
3Reliability
If execution mode transitions are restricted to maintain code isolation, then system security is improved, but software functionality is worsened
Solution Approach 1:
The patent implements dynamic control of execution mode transitions by allowing the transition permissions to be configured and changed based on system state and security requirements. The execution mode index management circuit can dynamically determine whether transitions are allowed based on the current privilege level and the stored transition information, enabling flexible functionality while maintaining security isolation.
Solution Approach 2:
The execution mode index management circuit acts as an intermediary between software components operating at different privilege levels. It mediates transition requests by checking the stored transition information and either allowing or blocking transitions, thereby enabling controlled interaction between isolated code segments and maintaining both security and functionality.
Data Source
AI summary
A processor circuit is configured to receive, while a current software agent is executing in a current execution mode, an indication of an execution mode transition that attempts to change an execution mode index from a current value indicative of the current execution mode to a new value indicative of a new execution mode. The processor circuit is configured to access, based on the current privilege level, particular execution mode transition information in a storage circuit to determine whether the execution mode transition is allowed. The processor circuit is configured to determine, based on particular execution mode transition information, whether to update the current value indicative of the current execution mode. The processor is further configured to update the current value indicative of the current execution mode based on a determination that the execution mode transition is permitted.