Execution Unit Local Memory and Time-Triggered Communication Paths

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Solution Overview

Problem

Existing computing devices for controlling fault-intolerant and safety-critical apparatuses do not adequately address fault prevention, security, and computing performance simultaneously.

Innovation Solution

A computing device with multiple execution units, each with a local memory unit, and a local network linking these units via communication paths. This configuration allows for exclusive access to communication paths during fixed time slots, enabling deterministic data transmission and preventing malicious code execution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple execution units share common communication paths without exclusive access control, then device complexity is reduced, but reliability and security deteriorate due to potential malicious code execution and data transmission faults

Engineering Contradiction:
Improvefault prevention and securityVSAvoidcommunication path management
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a time-triggered architecture where communication paths are allocated in periodic time slots. Each execution unit receives exclusive access to communication paths during its designated time slot, preventing simultaneous access conflicts and malicious code interference. This periodic time-division multiplexing ensures deterministic data transmission while maintaining system reliability.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The communication paths are segmented and allocated to different execution units based on a runtime schedule. Each execution unit is granted exclusive access to specific communication paths during its assigned time slot, effectively dividing the communication resource management into discrete, controllable segments. This segmentation prevents unauthorized access and ensures fault isolation.

Inventive Principle:
Principle #1Segmentation

2Reliability

If exclusive access to communication paths is granted during fixed time slots, then reliability and security improve, but productivity decreases due to time slot scheduling overhead

Engineering Contradiction:
Improvedeterministic data transmissionVSAvoidcomputing performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The runtime schedule is predetermined and compiled in advance, assigning specific time slots for communication path access to each execution unit. This preliminary scheduling eliminates the need for dynamic arbitration during runtime, ensuring deterministic data transmission without introducing scheduling overhead that would degrade computing performance. The schedule is optimized to minimize idle time and maximize resource utilization.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If execution units execute code from shared memory without local memory, then device complexity is reduced, but reliability deteriorates due to potential code execution faults and security vulnerabilities

Engineering Contradiction:
Improvefault preventionVSAvoidmemory architecture
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory architecture is segmented into local memory units associated with each execution unit. This segmentation isolates code and data storage at the execution unit level, preventing faulty or malicious code from affecting other execution units. Each execution unit executes code from its own local memory, ensuring fault isolation and enhancing system reliability while maintaining a manageable memory architecture.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20250060992A1Computing device, methods for providing and configuring a computing device, as well as computer system integration arrangement, program and computer-readable data carrier
Publication Date: 2025.02.20 AIRBUS (SAS)
  • US20250060992A1 patent drawing
  • US20250060992A1 patent drawing

AI summary

A computing device comprising at least one processing module carrying multiple execution units each with a local memory unit; and a local network of the processing module linking at least some of the execution units to each other by respective communication paths; wherein the execution units are configured to execute a binary code segment at least temporarily stored in their respective associated local memory unit and derived from a computer executable program code application containing application code sections; and wherein at least one of the execution units is designated for executing a binary code segment as an assigned binary code segment based on a pre-determined runtime schedule with fixed time slots during which the execution unit is granted exclusive access to at least one of the communication paths when executing the assigned binary code segment in line with a pre-defined running order of the application code sections.