Exit-less Host Page Table Switching via Identification Values
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Solution Overview
Problem
Current techniques for host page table switching in virtualization, such as using the 'vmfunc' instruction, incur overhead due to the need for hypercalls, which are computationally expensive and result in processing inefficiencies like high latency and power usage, as the guest supervisor cannot detect page table switches without requesting information from the hypervisor.
Innovation Solution
The system allocates a memory page for each page table, mapping it at a shared guest physical address and storing an identification value, allowing the guest supervisor to track and switch between page tables without hypercalls by loading and storing these values in memory and registers, thereby eliminating the need for hypercalls during context switching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the 'vmfunc' instruction is used for host page table switching, then page table switching can be performed, but hypercall overhead is incurred resulting in high latency and power usage
Solution Approach 1:
The patent extracts the page table identification information from the hypervisor and places it directly in guest-accessible memory locations. This allows the guest supervisor to detect page table switches without invoking hypercalls to the hypervisor, thereby eliminating the overhead and reducing both latency and power consumption while maintaining the ability to perform page table switching.
2Loss of information
If hypercalls are used for page table switching detection, then the guest supervisor can obtain page table information, but processing efficiency is reduced due to computational overhead
Solution Approach 1:
The patent performs preliminary action by pre-placing page table identification values in guest memory locations before the guest supervisor needs to detect them. This allows the guest supervisor to directly read the identification information from memory without needing to initiate hypercalls to the hypervisor, thereby maintaining full information access while significantly improving processing efficiency by eliminating the overhead of hypercall processing.
3Ease of operation
If memory pages are allocated for each page table with identification values, then exit-less switching is enabled, but memory allocation complexity increases
Solution Approach 1:
The patent applies universality by using standard memory allocation and mapping mechanisms that already exist in virtualized systems. The memory pages allocated for page tables serve dual purposes: they contain the actual page table entries and also store the identification values that enable guest supervisor detection. This multi-functionality approach enables exit-less switching without introducing fundamentally new or complex memory allocation structures, as it leverages existing memory management capabilities.
Data Source
AI summary
A system includes a memory, a processor, a hypervisor, and a guest supervisor. The hypervisor is configured to allocate a memory page for each page table of a set of page tables and map each memory page at the same address in each page table. The memory pages store an identification value identifying the respective page table. The guest supervisor is configured to receive control from an application operating on a first page table; retrieve a first identification value associated with the first page table; store the first identification value in guest memory; switch, at a first time, from the first page table to a second page table of the set of page tables; retrieve the first identification value stored in the guest memory; and switch, at a second time, control back to the application.